After reading all of these interesting thought provoking posts about the
Apple //Gs. I suppose I had better sell my personal //Gs Applied
Engineering Transwarp Accelerator card before the price drops. Any
Offers ?
Al
-----Original Message-----
From: Apple2list [mailto:[EMAIL PROTECTED] On Behalf Of
Geoff Strickler
Sent: Friday, October 28, 2005 12:03 PM
To: Apple2list
Subject: Re: TransWarpGS Needs (was RE: CFFA adapter's 4th run)
Correct, and we're looking at all those options. We would like to make
some improvements. The issue is that any significant redesign will add
more to the cost than would be offset by lower cost components because
production volume will be very low.
It will probably use newer FPLCAs, RAM, and CPU, which will reduce the
chip count (and cost), but the time to write a 65816 HARDWARE emulator
(remember, we would have to emulate all the CPU signals to the
motherboard and MMU) isn't justifiable unless we can sell at LEAST 5,000
units and that's beyond believability.
None of us are planning to get rich doing this, but we can't afford to
give away all our development time either. In small market development,
it's either a labor of love and compromises, or it's really expensive.
> From: "Byron Q. Desnoyers Winmill" <[EMAIL PROTECTED]>
> Reply-To: Apple2list <[email protected]>
> Date: Fri, 28 Oct 2005 06:41:49 -0400
> To: Apple2list <[email protected]>
> Subject: Re: TransWarpGS Needs (was RE: CFFA adapter's 4th run)
>
> On Thu, Oct 27, 2005 at 11:41:16PM -0500, Geoff Strickler wrote:
> If memory serves me correctly, the TWGS was a multilayer board with a
> daughter card and two or three dozen ICs. That would make it very
> expensive to reproduce. Worse yet, the card may need to be redesigned
> if some of the components are no longer available.
>
> The advantages of designing a new card from scratch: RAM is cheap
> today. You could create an 8 MB IIgs, and just mirror the memory that
> is used for hardware access. While I cannot claim to understand the
> TWGS, I'm willing to bet that that type of design would use fewer
> support chips than using a cache based approach. Relatively fast CPUs
> are also available today. You could write a 65816 CPU emulator to run
> on a non-native processor, and still have enough processing power
> available to take care of all of the house keeping (eg. mirroring the
> relevant bits of RAM).
>
> Byron.
>
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