On Thu, Oct 26, 2017 at 12:56:32PM -0700, Stephen Graf wrote:
> I have been using the driver and LAN connection for the past few days (ssh)
> and have had no problems.
>
> The driver diff is below.
> It works with a dtb that has the entries for emac listed below the diff. I
> have no idea of how the "official" dtb will look like, so there may be
> changes required for that. Also note Jonathan's comment about the
> possibility of multiple physicals. The Orangepi-one only has one NIC port
> and so it is not a concern there
Just a hint for next time: please use diff -u to create a unified diff,
which is much more readable.
>
>
> # diff /backup/src_backup_2017-10-22/if_dwxe.c
> /usr/src/sys/dev/fdt/if_dwxe.c
> 149,153c149,153
> < #define DWXE_MDIO_CMD_MDC_DIV_RATIO_M_MASK (0x7 << 20)
> < #define DWXE_MDIO_CMD_MDC_DIV_RATIO_M_16 (0 << 20)
> < #define DWXE_MDIO_CMD_MDC_DIV_RATIO_M_32 (1 << 20)
> < #define DWXE_MDIO_CMD_MDC_DIV_RATIO_M_64 (2 << 20)
> < #define DWXE_MDIO_CMD_MDC_DIV_RATIO_M_128 (3 << 20)
> ---
> > #define DWXE_MDIO_CMD_MDC_DIV_RATIO_M_MASK 0x7
> > #define DWXE_MDIO_CMD_MDC_DIV_RATIO_M_16 0
> > #define DWXE_MDIO_CMD_MDC_DIV_RATIO_M_32 1
> > #define DWXE_MDIO_CMD_MDC_DIV_RATIO_M_64 2
> > #define DWXE_MDIO_CMD_MDC_DIV_RATIO_M_128 3
> 238a239
> > #define SYSCON_H3_EPHY_ADDR_MASK 0x1f
> 272a274
> > int sc_phyloc;
> 360d361
> < int phyloc = MII_PHY_ANY;
> 375,376c376
> < phyloc = OF_getpropint(node, "reg", phyloc);
> <
> ---
> > sc->sc_phyloc = OF_getpropint(node, "reg", MII_PHY_ANY);
> 380,381c380,381
> < clock_enable(faa->fa_node, "stmmaceth");
> < reset_deassert(faa->fa_node, "stmmaceth");
> ---
> > clock_enable_all(faa->fa_node);
> > reset_deassert_all(faa->fa_node);
> 389c389
> < sc->sc_clk = clock_get_frequency(faa->fa_node, "stmmaceth");
> ---
> > sc->sc_clk = clock_get_frequency(faa->fa_node, "ahb");
> 427,428c427,428
> < mii_attach(self, &sc->sc_mii, 0xffffffff, phyloc,
> < MII_OFFSET_ANY, 0);
> ---
> > mii_attach(self, &sc->sc_mii, 0xffffffff, sc->sc_phyloc,
> > MII_OFFSET_ANY, MIIF_NOISOLATE);
> 469,470c469,476
> < panic("%s: setup internal phy", DEVNAME(sc));
> < return;
> ---
> > syscon &= ~SYSCON_H3_EPHY_SHUTDOWN;
> > syscon |= SYSCON_H3_EPHY_SELECT|SYSCON_H3_EPHY_CLK_SEL;
> > if (OF_getproplen(sc->sc_node,
> "allwinner,leds-active-low") >= 0)
> > syscon |= SYSCON_H3_EPHY_LED_POL;
> > else
> > syscon &= ~SYSCON_H3_EPHY_LED_POL;
> > syscon &= ~(SYSCON_H3_EPHY_ADDR_MASK <<
> SYSCON_H3_EPHY_ADDR_SHIFT);
> > syscon |= sc->sc_phyloc << SYSCON_H3_EPHY_ADDR_SHIFT;
> #
>
> From my dtb:
>
> ethernet@1c30000 {
> compatible = "allwinner,sun8i-h3-emac";
> syscon = <0x6>;
> reg = <0x1c30000 0x104>;
> reg-names = "emac";
> interrupts = <0x0 0x52 0x4>;
> resets = <0x2 0xc>, <0x2 0x27>;
> reset-names = "ahb", "ephy";
> clocks = <0x2 0x1b>, <0x2 0x43>;
> clock-names = "ahb", "ephy";
> pinctrl-names = "default";
> pinctrl-0 = <0x48>;
> #address-cells = <0x1>;
> #size-cells = <0x0>;
> status = "okay";
> phy-handle = <0x47>;
> phy-mode = "mii";
> allwinner,leds-active-low;
> phandle = <0x31>;
>
>
> ethernet-phy@1 {
> reg = <0x1>;
> phandle = <0x47>;
> };
> };
>
>
> syscon@1c00000 {
> compatible = "allwinner,sun8i-h3-system-controller",
> "syscon";
> reg = <0x1c00000 0x1000>;
> reg-names = "syscon";
> phandle = <0x6>;
> };
>
>
> -----Original Message-----
> From: Patrick Wildt [mailto:[email protected]]
> Sent: Thursday, October 26, 2017 3:48 AM
> To: Stephen Graf <[email protected]>
> Cc: [email protected]
> Subject: Re: dwxe driver works on orange pi one (Allwinner H3)
>
> On Mon, Oct 23, 2017 at 12:03:28PM -0700, Stephen Graf wrote:
> > Thank you for the advice. Yes that works, at least for the orange pi one.
>
>
> So, do things work for you now? You should send the full diff you're
> running with now.
>
