Hello,
Allwinner A10/20' UART has FIFO, but dmesg says no working FIFO.
This is caused by com_fdt.c tells 16550 not 16550A.
So here is the diff to fix this.
----
Index: com_fdt.c
===================================================================
RCS file: /cvs/src/sys/dev/fdt/com_fdt.c,v
retrieving revision 1.3
diff -u -p -r1.3 com_fdt.c
--- com_fdt.c 6 Aug 2018 10:52:30 -0000 1.3
+++ com_fdt.c 31 Dec 2019 00:51:07 -0000
@@ -117,7 +117,7 @@ com_fdt_attach(struct device *parent, st
sc->sc_iot = faa->fa_iot;
sc->sc_iobase = faa->fa_reg[0].addr;
- sc->sc_uarttype = COM_UART_16550;
+ sc->sc_uarttype = COM_UART_16550A;
sc->sc_frequency = freq ? freq : COM_FREQ;
sc->sc_reg_width = OF_getpropint(faa->fa_node, "reg-io-width", 4);
----
Diff is tested on Allwinner A20, Banana Pi BPI-M1 board.
(before)
sxits0 at simplebus0
com0 at simplebus0: ns16550, no working fifo
com0: console
com1 at simplebus0: ns16550, no working fifo
com2 at simplebus0: ns16550, no working fifo
sxitwi0 at simplebus0
(after)
sxits0 at simplebus0
com0 at simplebus0: ns16550a, 16 byte fifo
com0: console
com1 at simplebus0: ns16550a, 16 byte fifo
com2 at simplebus0: ns16550a, 16 byte fifo
sxitwi0 at simplebus0
Allwinner's UART has 64byte FIFO and com_fifo_probe() detects exact size.
But com_fifo_probe() adopts smaller FIFO size so the result is 16byte,
comes from sc->sc_fifolen.
Is there any reason to disable FIFO on FDT based UART devices?
If there is no problem, I want to commit this.
Regards,
--
SASANO Takayoshi (JG1UAA) <[email protected]>
