> Date: Mon, 18 Jan 2021 20:15:44 +0900
> From: SASANO Takayoshi <[email protected]>
>
> Here's the diff. Enabling FIFO is DesignWare's APB-UART only.
> Tested on Allwinner H6 and H2+, both no problem.
This will need some wider testing; in particular we need to test this
on various Rockchip and Marvell platforms.
> Index: fdt/com_fdt.c
> ===================================================================
> RCS file: /cvs/src/sys/dev/fdt/com_fdt.c,v
> retrieving revision 1.4
> diff -u -p -r1.4 com_fdt.c
> --- fdt/com_fdt.c 23 Mar 2020 21:40:01 -0000 1.4
> +++ fdt/com_fdt.c 17 Jan 2021 11:46:24 -0000
> @@ -33,8 +33,6 @@
> #include <dev/ofw/ofw_clock.h>
> #include <dev/ofw/ofw_pinctrl.h>
>
> -#define com_usr 31 /* Synopsys DesignWare UART */
> -
> int com_fdt_match(struct device *, void *, void *);
> void com_fdt_attach(struct device *, struct device *, void *);
> int com_fdt_intr_designware(void *);
> @@ -125,8 +123,10 @@ com_fdt_attach(struct device *parent, st
> sc->sc_reg_shift = OF_getpropint(faa->fa_node, "reg-shift", 2);
>
> if (OF_is_compatible(faa->fa_node, "snps,dw-apb-uart") ||
> - OF_is_compatible(faa->fa_node, "marvell,armada-38x-uart"))
> + OF_is_compatible(faa->fa_node, "marvell,armada-38x-uart")) {
> + sc->sc_uarttype = COM_UART_DW_APB;
> intr = com_fdt_intr_designware;
> + }
>
> if (OF_is_compatible(faa->fa_node, "ti,omap3-uart") ||
> OF_is_compatible(faa->fa_node, "ti,omap4-uart"))
> Index: ic/com.c
> ===================================================================
> RCS file: /cvs/src/sys/dev/ic/com.c,v
> retrieving revision 1.173
> diff -u -p -r1.173 com.c
> --- ic/com.c 14 Aug 2020 18:14:11 -0000 1.173
> +++ ic/com.c 17 Jan 2021 11:46:25 -0000
> @@ -1300,7 +1300,7 @@ void
> com_attach_subr(struct com_softc *sc)
> {
> int probe = 0;
> - u_int8_t lcr;
> + u_int8_t lcr, fifo;
>
> sc->sc_ier = 0;
> /* disable interrupts */
> @@ -1480,6 +1480,25 @@ com_attach_subr(struct com_softc *sc)
> SET(sc->sc_hwflags, COM_HW_FIFO);
> sc->sc_fifolen = 256;
> break;
> + case COM_UART_DW_APB:
> + printf(": DesignWare APB UART, ");
> + SET(sc->sc_hwflags, COM_HW_FIFO);
> + sc->sc_fifolen = CPR_FIFO_MODE(com_read_reg(sc, com_cpr)) * 16;
> + if (sc->sc_fifolen) {
> + printf("%d byte fifo\n", sc->sc_fifolen);
> + } else {
> + printf("no fifo\n");
> + /*
> + * Allwinner H6's DW-APB configuration does not have
> + * CPR register and detect as no fifo.
> + * But this UART has 256 bytes FIFO and disabling FIFO
> + * makes problem; LSR_RXRDY is still set after
> + * reading com_data when FIFO is disabled (errata?).
> + * For workaround, treat as 1 byte FIFO.
> + */
> + sc->sc_fifolen = 1;
> + }
> + break;
> default:
> panic("comattach: bad fifo type");
> }
> @@ -1496,10 +1515,13 @@ com_attach_subr(struct com_softc *sc)
> }
>
> /* clear and disable fifo */
> - com_write_reg(sc, com_fifo, FIFO_RCV_RST | FIFO_XMT_RST);
> + /* DW-APB UART cannot turn off FIFO here (ddb will not work) */
> + fifo = (sc->sc_uarttype == COM_UART_DW_APB) ?
> + (FIFO_ENABLE | FIFO_TRIGGER_1) : 0;
> + com_write_reg(sc, com_fifo, fifo | FIFO_RCV_RST | FIFO_XMT_RST);
> if (ISSET(com_read_reg(sc, com_lsr), LSR_RXRDY))
> (void)com_read_reg(sc, com_data);
> - com_write_reg(sc, com_fifo, 0);
> + com_write_reg(sc, com_fifo, fifo);
>
> sc->sc_mcr = 0;
> com_write_reg(sc, com_mcr, sc->sc_mcr);
> Index: ic/comreg.h
> ===================================================================
> RCS file: /cvs/src/sys/dev/ic/comreg.h,v
> retrieving revision 1.20
> diff -u -p -r1.20 comreg.h
> --- ic/comreg.h 14 Aug 2020 18:14:11 -0000 1.20
> +++ ic/comreg.h 17 Jan 2021 11:46:25 -0000
> @@ -180,6 +180,9 @@
> #define ISR_TXPL 0x08 /* negative transmit data polarity */
> #define ISR_RXPL 0x10 /* negative receive data polarity */
>
> +/* component parameter register (Synopsis DesignWare APB UART) */
> +#define CPR_FIFO_MODE(x) (((x) >> 16) & 0xff)
> +
> #define COM_NPORTS 8
>
> /* Exar XR17V35X */
> Index: ic/comvar.h
> ===================================================================
> RCS file: /cvs/src/sys/dev/ic/comvar.h,v
> retrieving revision 1.58
> diff -u -p -r1.58 comvar.h
> --- ic/comvar.h 14 Aug 2020 18:14:11 -0000 1.58
> +++ ic/comvar.h 17 Jan 2021 11:46:25 -0000
> @@ -104,6 +104,7 @@ struct com_softc {
> #define COM_UART_XR16850 0x10 /* 128 byte fifo */
> #define COM_UART_OX16C950 0x11 /* 128 byte fifo */
> #define COM_UART_XR17V35X 0x12 /* 256 byte fifo */
> +#define COM_UART_DW_APB 0x13 /* configurable */
>
> u_char sc_hwflags;
> #define COM_HW_NOIEN 0x01
> Index: ic/ns16550reg.h
> ===================================================================
> RCS file: /cvs/src/sys/dev/ic/ns16550reg.h,v
> retrieving revision 1.5
> diff -u -p -r1.5 ns16550reg.h
> --- ic/ns16550reg.h 2 Jun 2003 23:28:02 -0000 1.5
> +++ ic/ns16550reg.h 17 Jan 2021 11:46:25 -0000
> @@ -50,3 +50,9 @@
> #define com_lsr 5 /* line status register (R/W) */
> #define com_msr 6 /* modem status register (R/W) */
> #define com_scratch 7 /* scratch register (R/W) */
> +
> +/*
> + * Synopsis DesignWare APB UART additioal registers
> + */
> +#define com_usr 31 /* UART status register (R) */
> +#define com_cpr 61 /* component parameter register (R) */
>
> --
> SASANO Takayoshi (JG1UAA) <[email protected]>
>
