Here are Greg's first ideas about the new hardware, my comments, and his answers.
Sébastien ---------- Forwarded Message ---------- Subject: RE: FW: initial specification of the project Date: Friday, 25 March 2016, 12:24:02 PM HKT From: Grzegorz Kasprowicz <gkasp...@elka.pw.edu.pl> To: 'Sébastien Bourdeauducq' <s...@m-labs.hk> CC: r...@m-labs.hk, joe.britton....@gmail.com Hi Sebastien My comments (**) are below -----Original Message----- From: Sébastien Bourdeauducq [mailto:s...@m-labs.hk] Sent: Thursday, March 24, 2016 4:54 AM To: Grzegorz Kasprowicz <gkasp...@elka.pw.edu.pl> Cc: r...@m-labs.hk; joe.britton....@gmail.com Subject: Re: FW: initial specification of the project Hi, Thanks for the documents. Some quick comments: * there are too few SFPs on the MCH. Can we have a double-width card instead with at least 4 SFPs? **Sure, we can. It would be easier for me:) * whether or not we use Zynq remains to be decided. **The price difference is not that high (a few tens of $) and we get plenty of CPU power * transceivers on the backplane are acceptable but not necessary; since we have multiple signals we can transmit a clock and use the regular IOSERDES to lower FPGA requirements. **Well, IOSERDES can go up to 1.2Gbit n synchronous mode. **GTH can go 12Gbit/s easily **Are you sure you want to relay only on IOSERDES? * what is the other large BGA chip on the MCH rendering? Is it the Macom M21048 48x48 crossbar? Let's not use such a device, which looks unnecessary, complicated, and very proprietary. There isn't even a public datasheet for it. We do not need direct communication between the AMCs. **At the moment not, but remember that it's going to be research platform **I can make an option with this chip not mounted. I simply see another potential of this board and the place on the PCB does not cost single $ since we have to use standard module **dimensions:) The price of the crossbar is not high, I easily got 2 free samples. **In case of the datasheet, I got it easily after I signed the NDA. * we want to avoid RTMs and instead put the DAC/ADCs on the AMC card and have analog plug-ins using the FMC form factor (see my document). **Are you sure you would get noise performance from such setup that satisfies you? Can we have those discussions on the ARTIQ mailing list? **Sure. **Best ragards, **Greg Best regards, Sébastien On Wednesday, 23 March 2016 8:22:18 PM HKT you wrote: > Hi Sebastien > > Please have a look at initial specification of the HW we plan to develop. > > Greg > > > -----------------------------------------
ARTIQ_WUT_R&D specification.pdf
Description: Adobe PDF document
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