Hi all, I have more basic questions regarding timing DDS output from Urukul. So we have version 1.1 with AD9912 (14-bit phase resolution).
First of all, how does one select the MMCX input for internal clock (for locking with Kasli's clock output)? I'm assuming that's done with the DIP switches on the board, but I couldn't find any documentation on that. Generating pulses with known frequency works fine by doing e.g (2 channels with fixed phase relation). ... self.urukul0_ch0.set(10*MHz, phase = 0.0) self.urukul0_ch1.set(10*MHz, phase = 0.0) ... self-urukul0_ch0.sw0.on() self-urukul0_ch1.sw0.on() delay(10*us) self-urukul0_ch0.sw0.off() self-urukul0_ch1.sw0.off() delay(10*us) ... Initial phase of pulse varies from run to run, but I assume that's because I'm using the internal XO of Urukul (100 MHz), which is not locked to Kasli's timeline. Relative phase can be adjusted with the phase parameters in the set methods above, but results are counterintuitive. For example value of 0.1 equals to about 180 degrees at 10MHz, but not for e.g. 11MHz. I understood from the documentation, that phase units are turns (i.e. 1 turn = 2*pi) in the DDS frequency, but apparently it's not so? Quick browse of the source for the AD9912 module seems to indicate, that the phase value above is scaled to a 16-bit integer, although the phase resolution is only 14 bits (even AD9912 indicates, that the chip takes a 14-bit word for phase adjustment)? So how does one get relative phases of the DDS-channels set correctly? Thanks in advance! BR Kalle Hanhijärvi
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