Martin, My PTF level is UK48077.
R3 points to BASE at offset 590. R15 points to an unlabeled instruction at offset 562. Both LAY instructions address the same instruction, but use different offsets, as one would expect. John P. Baker -----Original Message----- From: IBM Mainframe Assembler List [mailto:assembler-l...@listserv.uga.edu] On Behalf Of Martin Trübner Sent: Thursday, December 30, 2010 8:58 AM To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Re: A bug or a feature? John, are you saying that the two LAY instructions generate the same offset? What PTF-Level is your VSE and your HLASM? Mine is: 4.3 HLASM is at: (PTF UK59313) HLASM R6.0 -- Martin Pi_cap_CPU - all you ever need around MWLC/SCRT/CMT in z/VSE more at http://www.picapcpu.de
