The ABEND macro unfortunately disturbs a couple of registers. Various S0C1/2/3 strategies are better from a "debugging the original problem" point of view, if not from a code obscurity point of view.
J *+2 is easy to understand. It jumps to the second halfword of the instruction itself (*+0 would be a tight loop, *+4 would be the next instruction, *+2 is mama bear right in the middle). The second halfword is the offset of the jump divided by 2, so the second halfword is X'0001'. X'00xx' is a guaranteed S0C1 per the architecture. Charles -----Original Message----- From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On Behalf Of Paul Gilmartin Sent: Monday, August 6, 2018 7:51 AM To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Re: EX On 2018-08-06, at 08:35:57, Ed Jaffe wrote: > We use 'Jxx *+2' which disturbs no registers and is guaranteed to fail with an 0C1. > I am *not* going to read the PoOps to learn why that "is guaranteed to fail". I'm merely dismissing it as elitist opaque code. Comments help only slightly. > On 8/6/2018 3:10 AM, Jonathan Scott wrote: >> J *+1 isn't even possible, as the hardware offset for relative >> addressing is in halfwords. >> >> For many years I have been using a conditional TRAP macro which >> is equivalent to >> BC cond,*+1 >> but which is coded using LA with an ORG back to change the >> opcode, to avoid getting an error message. This avoids a branch >> in the normal case. It is primarily used for integrity and >> consistency checks, and my recovery routine recognizes this >> convention and reports it as "TRAP occurred at offset &1 in &2". >> John Gilmore has argued, reasonably, in IBM-MAIN, for proper use of the ABEND macro rather than such flamboyant stunts. -- gil
