Yes, and the register contents shown are what I would expect if the routine did not mess with R14 before issuing the BAKR.
As you noted, the OP did not provide the RB chain, so we' all going by guesswork :-( -- Shmuel (Seymour J.) Metz http://mason.gmu.edu/~smetz3 ________________________________________ From: IBM Mainframe Assembler List [ASSEMBLER-LIST@LISTSERV.UGA.EDU] on behalf of Jonathan Scott [jonathan_sc...@vnet.ibm.com] Sent: Sunday, May 30, 2021 4:31 AM To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Re: What's wrong with me? Ref: Your note of 30 May 2021, 01:19:09 +0000 I don't know the specifics of the routine which is showing the error information in this case, but as I already said, the PSW and registers appear to be for the caller's linkage stack level. The interrupt code is however related to the current RB level, so in this case it does not relate to the PSW and registers. Shmuel (Seymour J.) Metz writes: > For an SVC, the PSW would point just after the SVC, not just > after the BALR. It seems more likely that the PSW shown comes > from the stack. Jonathan Scott, HLASM IBM Hursley, UK
