As others have mentioned, you can roll both the L1 and L2 into the reg you are using to OR into the ZAP instruction.

But, remember, this is an OR, not a store. If one of your lengths is a constant, while the other is a variable, then you only need to fill one of the lengths into the reg.

This example from Dave works if both are variable:
ZAP_IT   ZAP   PWORK16(0),0(0,R1)
  ...snip...
           LHI R2,15*16         SET LENGTH OF WORK FIELD
           L   R3,FLD_LENG      SET LENGTH OF VAR DATA
           SHI R3,1             DECREMENT FOR EXECUTE
           AR  R2,R3            COMBINE THE TWO
           EX  R2,ZAP_IT        MOVE VAR DATA TO WORK FIELD

This is an example where you only need to adjust the sending field length:
ZAP_IT   ZAP   PWORK16(16),0(0,R1)
  ...snip...
           LH  R2,SEND_LENGTH   SET LENGTH OF WORK FIELD
           SHI R3,1             DECREMENT FOR EXECUTE
           EX  R2,ZAP_IT        MOVE VAR DATA TO WORK FIELD

This is an example where you only need to adjust the receiving field:
ZAP_IT   ZAP   PWORK16(0),0(16,R1)
  ...snip...
           LH  R2,RECV_LENGTH   SET LENGTH OF WORK FIELD
           SHI R3,1             DECREMENT FOR EXECUTE
           SLA R2,4             SHIFT TO CORRECT SPOT
           EX  R2,ZAP_IT        MOVE VAR DATA TO WORK FIELD


Tony Thigpen

Dave Clark wrote on 2/11/22 17:03:
         How do (can?) you EXecute a ZAP instruction?  I have a packed
number in plain character format that can vary in length from 1 to 16
bytes.  I need to move that into a 16-byte formal packed work field in
order to make the variable-length character data into recognizable
packed-decimal data.

         The normal EXecute (ORs but effectively) replaces bits 8 to 15 of
the target instruction with bits 56 to 63 of general register R1.  But a
ZAP instruction has an L1 field in bits 8 to 11 of the instruction and an
L2 field in bits 12 to 15 of the instruction.

         Does that mean ZAP can't be EXecuted?  Do I have to clear and
align my variable-length character data in my 16-byte packed work field
myself?  Or is it feasible to manipulate the content of general register
R1 so that bits 56 to 63 contain the correct L1 and L2 values?

Sincerely,

Dave Clark
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