Re: Signed/unsigned operations

[Seymour J Metz]

Yikes! What are the gcc default options?


--
Shmuel (Seymour J.) Metz
http://mason.gmu.edu/~smetz3

________________________________________
From: IBM Mainframe Assembler List [ASSEMBLER-LIST@LISTSERV.UGA.EDU] on behalf 
of Ngan, Robert (DXC Luxoft) [robert.n...@dxc.com]
Sent: Thursday, April 14, 2022 12:08 PM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: Signed/unsigned operations

STRL/STGRLl?
Is the GCC compiler generating non-reentrant code?

Robert Ngan
DXC Luxoft

-----Original Message-----
From: IBM Mainframe Assembler List <ASSEMBLER-LIST@LISTSERV.UGA.EDU> On Behalf 
Of Ian Worthington
Sent: Thursday, April 14, 2022 08:05
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Signed/unsigned operations

I noticed today that GCC generates for:
static __uint32_t sumu32;  // unsigned int static __uint64_t sumu64;  // 
unsigned long

void addStuff(__uint64_t a64, __uint64_t b64, __uint32_t a32, __uint32_t b32 ) {
    sumu32 = a32 + b32;
    sumu64 = a64 + b64;
}
the following:

117: ****     sumu32 = a32 + b32;
  77                      .loc 1 117 0
  78 0044 5810B1C4         l    %r1,452(%r11)    # sumu32.6, a32
  79 0048 5A10B1C0         a    %r1,448(%r11)    # sumu32.6, b32
  80 004c C41F0000         strl    %r1,sumu32    # sumu32.6, sumu32
  80      0000
 118: ****     sumu64 = a64 + b64;
  81                      .loc 1 118 0
  82 0052 E310B1D0         lg    %r1,464(%r11)    # sumu64.7, a64
  82      0004
  83 0058 E310B1C8         ag    %r1,456(%r11)    # sumu64.7, b64
  83      0008
  84 005e C41B0000         stgrl    %r1,sumu64    # sumu64.7, sumu64


Have I grossly misunderstood something there?  Can I really operate on an 
unsigned integer with signed operations and get the correct results?



Best wishes / Mejores deseos /  Meilleurs vœux

Ian ...