Keven, all, I have not yet used those, but am hoping to find time to explore VEVAL.
This seems to be a step into the direction of adopting elements of VLIW architecture (Very Long Instruction Word) FWIW: some 25 years ago I worked on a processor that did support VLIW. Most instructions were just 2-4 bytes, but the real VLIW instructions could reach up to 48 bytes (IIRC). Those instructions directly addressed registers, accumulators, barrel shifters, and ALUs in the processor. Extremely powerful when used in a very tight loop. When I first glanced upon the VEVAL description in the PoP it immediately reminded me of that (now old) processor. It may be a while, but I expect I'll have fun experimenting with that one! Kind regards & Happy programming! Abe === On 05/09/2025 20:59, Keven Hall wrote: > ?Amongst the new instructions debuting for the z17, this particular pair (Bit > Deposit/Extract) piqued my curiosity. > > I think these have the potential to be game-changing for some applications. > > Aside from simple data compression and decompression applications, they could > be used to marshal numeric bit-field data to and from high/low words of > registers in order to perform numeric operations on them. > > My guess is that these were implemented for language compilers, but I think > they hold great promise for hand-coded assembler applications. > > Have any of you used these yet? > > Keven
