Peter Svensson wrote:
On Mon, 16 May 2005, Steve Underwood wrote:
It is possible, though complicated, to synchronize the 2Mbit clocks on two
unrelated cards by measuring the accumulated phase shift (difference in
interrupt rate) over time and compensating, thus implementing a PLL in
software. Digium has not shown any intereset in such a solution. It is not
clear if the internal hardware clock generator can be fine tuned enough to
implement this.
How can that work? You can measure the error, but you have no ability to
tweak the clock from software. Two cards could only be synced by hardware.
In most hardware the clock you use is not provided by a crystal. Rather
the crystal provides a reference for a pll. The conversion factor between
the crystan and the derived clock is usually tunable.
Nope. Its always a crystal. Its either a pullable crystal in a VCXO, or
its pulse-stuffed. It is required by the ITU specs to settle within
50ppm of the correct frequency when there is no signal driving its PLL,
but many are out of spec. This is neither here nor there for the matter
under discussion.
Whether the actual clock on the Digium cards is tunable enough I do not
know. There are quite a few references to programming the clock in the
source.
Have you ever seen a framer where software can tune it? Its a hardware
thing.
Regards,
Steve
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