Well, the CPU architecture is different. But this is not really the cause...
As far as I understand the problem, the ath5k driver or the entire mac80211 framework is ported to OpenWRT by the team. There are differences between the one you use on the Intel sys and on the OpenWRT boxes. The best place to request for fix is the OpenWRT mailing list. regards; Peizhao On 05/05/11 05:55, Russell Senior wrote: >>>>>> "Felix" == Felix Fietkau<n...@openwrt.org> writes: >>> Well, I see the same on FreeBSD/MIPS whenever an Atheros device is >>> fondled incorrectly. Either because the chip isn't yet fully awake >>> or the register plainly doesn't exist. >>> >>> See if you can add some debugging in ath5k_hw_reset_tx_queue() to >>> see which register is being read/written before the PCI bus error >>> occurs. > Felix> If I read the trace correctly, the accessed register is 0x111c, > Felix> which is AR5K_QUEUE_DFS_MISC(7). If I remember correctly, queue > Felix> 7 is the beacon queue. Access to this register should never > Felix> fail unless the hardware is in sleep mode, or there is some > Felix> other PCI related issue. Unfortunately, this issue might be > Felix> caused by something entirely different that is not visible in > Felix> the stack trace. I have observed that messing up the internal > Felix> state of a PCI card can trigger an error that only shows up > Felix> much later and thus can only be found by doing a thorough code > Felix> review or by analyzing PCI traces. > > I wonder what is special about MIPS (relative to x86, where I don't > see the panics). > > _______________________________________________ ath5k-devel mailing list ath5k-devel@lists.ath5k.org https://lists.ath5k.org/mailman/listinfo/ath5k-devel
