John, please drop this patch will resend a proper v2 patch, as its better to have a unique GPIO rfkill selection mask for AR5416 family of chip sets and AR93XX.
On Wednesday 28 September 2011 06:49 PM, Mohammed Shafi Shajakhan wrote: > From: Mohammed Shafi Shajakhan<moham...@qca.qualcomm.com> > > this extends the bits for rf kill GPIO selection to [7:2] from [4:2] as > we use GPIO pin 11 as rfkill for AR9480 and also remove few unused macros > > Cc: Wilson Tsao<wt...@qca.qualcomm.com> > Cc: "Hu, Russell"<r...@qca.qualcomm.com> > Signed-off-by: Mohammed Shafi Shajakhan<moham...@qca.qualcomm.com> > --- > drivers/net/wireless/ath/ath9k/eeprom.h | 7 +------ > 1 files changed, 1 insertions(+), 6 deletions(-) > > diff --git a/drivers/net/wireless/ath/ath9k/eeprom.h > b/drivers/net/wireless/ath/ath9k/eeprom.h > index a3c7d0c..9bde45c 100644 > --- a/drivers/net/wireless/ath/ath9k/eeprom.h > +++ b/drivers/net/wireless/ath/ath9k/eeprom.h > @@ -104,16 +104,11 @@ > #define OLC_FOR_AR9287_10_LATER (AR_SREV_9287_11_OR_LATER(ah)&& \ > ah->eep_ops->get_eeprom(ah, EEP_OL_PWRCTRL)) > > -#define AR_EEPROM_RFSILENT_GPIO_SEL 0x001c > -#define AR_EEPROM_RFSILENT_GPIO_SEL_S 2 > -#define AR_EEPROM_RFSILENT_POLARITY 0x0002 > -#define AR_EEPROM_RFSILENT_POLARITY_S 1 > - > #define EEP_RFSILENT_ENABLED 0x0001 > #define EEP_RFSILENT_ENABLED_S 0 > #define EEP_RFSILENT_POLARITY 0x0002 > #define EEP_RFSILENT_POLARITY_S 1 > -#define EEP_RFSILENT_GPIO_SEL 0x001c > +#define EEP_RFSILENT_GPIO_SEL 0x00fc > #define EEP_RFSILENT_GPIO_SEL_S 2 > > #define AR5416_OPFLAGS_11A 0x01 _______________________________________________ ath9k-devel mailing list ath9k-devel@lists.ath9k.org https://lists.ath9k.org/mailman/listinfo/ath9k-devel
