On 2012-10-02 3:13 PM, Adrian Chadd wrote: > .. well, the rule here is "You shouldn't get PERR/FATAL interrupts." > > Haven't I posted a summary of what those errors are? > > Ok. So they're signals from the PCIe core (named host1_fatal and > host1_perr. Helpfully.) Those errors occured during a DMA transfer. > > So the question is why you're seeing PERR interrupts when creating an > adhoc interface. That hints to me that something odd is going on.. > > I've seen these issues creep up when the NIC is in some way behaving > very, very badly (lots of timeouts and sync errors with little to no > traffic at all), which resulted in all kinds of odd and weird, > unstable behaviour. After replacing the NIC with another NIC (in my > case, an AR9280 -> AR9280 NIC :-) the errors went away and things > continued swimmingly. > > I'd have to go digging through the PCIe core source to figure out > exactly what host1_peer and host1_fatal mean. I can if you'd like, > it'll just take some time as I'm not familiar at all with the PCIe > host interface. According to the datasheet, AR_INTR_SYNC_HOST1_PERR is triggered by an invalid register access, and AR_INTR_SYNC_HOST1_FATAL is triggered by corrupt descriptors or other DMA issues. Maybe you can get some information on the source of this PERR error if you record the last register accesses outside of the irq context and print them once this IRQ comes in.
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