Flemming Gram Christensen skrev:
Hi list.
What is the reason that the TXC bit is not cleared when you write a
byte into UDR?
I am using a mega169, but the other devices do probably behave similar.
The TXC bit is set when the last bit in the UART shift register is
transmitted and UDR does not contain a byte to transmit. The bit is
cleared then the transmit complete interrupts is executed and can be
cleared manually in software.
Why is it not cleared also when starting transmission of a new byte?
I am guessing here, but:
The TXC could be seen as a tx underflow indicator. If it was cleared
automatically you could loose this information. Normally when
transmitting continuously data you would want to use the UDRE bit, that
tells that you can send more data.
-Bjarne Laursen, RoseTechnology A/S, Denmark
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