Juergen Harms <[email protected]> wrote: > Is this a known problem?
Basically, it is, yes. However, I didn't have time to analyze enough *why* this is the case, and what needs to be changed. If anyone wants to investigate (by comparing with what Atmel Studio does), they are welcome. In the JTAGICEmkII, single-byte EEPROM updates have been apparently managed by the ICE telling the CPU to update the respective cell. The net effect of this was that these updates only worked if the OCDEN fuse was set. For the JTAGICE3, I still have no real clue about the requirements. Page-wise updates, using the -U option on the commandline, are a different thing, with a different set of problems. On the JTAGICEmkII, they only worked on an EEPROM that has been erased before. As there is no page-erase command (on non-Xmega AVRs), this could only be accomplished by a device erase with the EESAVE fuse not being set. Finally, for Xmega devices, everything could be vastly different again. -- cheers, Joerg .-.-. --... ...-- -.. . DL8DTL http://www.sax.de/~joerg/ Never trust an operating system you don't have sources for. ;-) _______________________________________________ AVR-chat mailing list [email protected] https://lists.nongnu.org/mailman/listinfo/avr-chat
