The Detailed Description section contains this:
These macros operate via automatic manipulation of the Global Interrupt
Status (I) bit of the SREG register. Exit paths from both block types are
all managed automatically without the need for special considerations,
i. e. the interrupt status will be restored to the same value it has
been when entering the respective block.
I think the last sentence of this paragraph is not generally true, since it
depends on the ATOMIC_FORCEON or ATOMIC_RESTORESTATE attribute.
Britton
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