Follow-up Comment #6, bug #28574 (project avr-libc):
1. I am referring to doc8135.pdf from atmel website (XMEGA D4 preliminary).
ADC overview (section 23) says, ADC has one channel only. Where exactly/else
can we find out that XMEGA D4 has 4 ADC channels similar to that of XMEGA A4?
2. Assuming that D4 is similar to that of A4 in ADC structure and channels, I
find that 2 more modifications are necessary other than the proposed 0x12-0x17
changes to ADC_t structure.
Firstly, 0x07 appears to be specified as TEMP register in A4 datasheet while
it is termed as reserved in *ALL* xmega headers (just not limited to D4).
#iox16d4.h
register8_t reserved_0x07;
Secondly, offsets are required for other channels (1,2,3).
ADC_CH_t CH1; /* ADC Channel 1 */
ADC_CH_t CH2; /* ADC Channel 2 */
ADC_CH_t CH3; /* ADC Channel 3 */
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