On Mon, Sep 24, 2012 at 01:04:37PM +0200, Sascha Hauer wrote:
> +{
> + clks[pll1_sw] = imx_clk_pllv2("pll1_sw", "osc", (void
> *)MX51_PLL1_BASE_ADDR);
> + clks[pll2_sw] = imx_clk_pllv2("pll2_sw", "osc", (void
> *)MX51_PLL2_BASE_ADDR);
> + clks[pll3_sw] = imx_clk_pllv2("pll3_sw", "osc", (void
> *)MX51_PLL2_BASE_ADDR);
typo: Should be MX51_PLL3_BASE_ADDR. Will fix.
Sascha
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