From: Eric Bénard <e...@eukrea.com> this board is produced by Embest/Element 14 and is based on i.MX6 Solo The following features are tested : - UART2 (console) - eMMC - SDCard - uSDCard - Ethernet - USB Host (through 4 ports hub) - I2C 1/2/3 - 2 LEDs
Boot on eMMC and through USB loader are tested. For more informations on this board : http://www.riotboard.org/ Signed-off-by: Eric Bénard <e...@eukrea.com> Signed-off-by: Lucas Stach <l.st...@pengutronix.de> --- v2 lst: - rebase to current master - add barebox update handler - add to imx_v7_defconfig --- arch/arm/boards/Makefile | 1 + arch/arm/boards/embest-riotboard/Makefile | 3 + arch/arm/boards/embest-riotboard/board.c | 90 +++++ .../flash-header-embest-riotboard.imxcfg | 62 ++++ arch/arm/boards/embest-riotboard/lowlevel.c | 43 +++ arch/arm/configs/imx_v7_defconfig | 1 + arch/arm/dts/Makefile | 4 +- arch/arm/dts/imx6s-riotboard.dts | 391 +++++++++++++++++++++ arch/arm/mach-imx/Kconfig | 4 + images/Makefile.imx | 5 + 10 files changed, 603 insertions(+), 1 deletion(-) create mode 100644 arch/arm/boards/embest-riotboard/Makefile create mode 100644 arch/arm/boards/embest-riotboard/board.c create mode 100644 arch/arm/boards/embest-riotboard/flash-header-embest-riotboard.imxcfg create mode 100644 arch/arm/boards/embest-riotboard/lowlevel.c create mode 100644 arch/arm/dts/imx6s-riotboard.dts diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile index 16742d9..eb35e6b 100644 --- a/arch/arm/boards/Makefile +++ b/arch/arm/boards/Makefile @@ -28,6 +28,7 @@ obj-$(CONFIG_MACH_EDB9307) += edb93xx/ obj-$(CONFIG_MACH_EDB9315A) += edb93xx/ obj-$(CONFIG_MACH_EDB9315) += edb93xx/ obj-$(CONFIG_MACH_EFIKA_MX_SMARTBOOK) += efika-mx-smartbook/ +obj-$(CONFIG_MACH_EMBEST_RIOTBOARD) += embest-riotboard/ obj-$(CONFIG_MACH_EUKREA_CPUIMX25) += eukrea_cpuimx25/ obj-$(CONFIG_MACH_EUKREA_CPUIMX27) += eukrea_cpuimx27/ obj-$(CONFIG_MACH_EUKREA_CPUIMX35) += eukrea_cpuimx35/ diff --git a/arch/arm/boards/embest-riotboard/Makefile b/arch/arm/boards/embest-riotboard/Makefile new file mode 100644 index 0000000..9f8e1f2 --- /dev/null +++ b/arch/arm/boards/embest-riotboard/Makefile @@ -0,0 +1,3 @@ +obj-y += board.o flash-header-embest-riotboard.dcd.o +extra-y += flash-header-embest-riotboard.dcd.S flash-header-embest-riotboard.dcd +lwl-y += lowlevel.o diff --git a/arch/arm/boards/embest-riotboard/board.c b/arch/arm/boards/embest-riotboard/board.c new file mode 100644 index 0000000..638d0f6 --- /dev/null +++ b/arch/arm/boards/embest-riotboard/board.c @@ -0,0 +1,90 @@ +/* + * Copyright (C) 2014 Eric Bénard <e...@eukrea.com> + * Copyright (C) 2013 Lucas Stach <l.st...@pengutronix.de> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <asm/armlinux.h> +#include <asm/io.h> +#include <bootsource.h> +#include <common.h> +#include <environment.h> +#include <envfs.h> +#include <gpio.h> +#include <init.h> +#include <mach/generic.h> +#include <mach/imx6-regs.h> +#include <mach/imx6.h> +#include <mach/bbu.h> +#include <mfd/imx6q-iomuxc-gpr.h> +#include <sizes.h> +#include <linux/phy.h> + +static int ar8035_phy_fixup(struct phy_device *dev) +{ + u16 val; + + /* Ar803x phy SmartEEE feature cause link status generates glitch, + * which cause ethernet link down/up issue, so disable SmartEEE + */ + phy_write(dev, 0xd, 0x3); + phy_write(dev, 0xe, 0x805d); + phy_write(dev, 0xd, 0x4003); + + val = phy_read(dev, 0xe); + phy_write(dev, 0xe, val & ~(1 << 8)); + + /* To enable AR8031 ouput a 125MHz clk from CLK_25M */ + phy_write(dev, 0xd, 0x7); + phy_write(dev, 0xe, 0x8016); + phy_write(dev, 0xd, 0x4007); + + val = phy_read(dev, 0xe); + val &= 0xffe3; + val |= 0x18; + phy_write(dev, 0xe, val); + + /* introduce tx clock delay */ + phy_write(dev, 0x1d, 0x5); + val = phy_read(dev, 0x1e); + val |= 0x0100; + phy_write(dev, 0x1e, val); + + return 0; +} + +static int riotboard_device_init(void) +{ + if (!of_machine_is_compatible("embest,riotboard")) + return 0; + + phy_register_fixup_for_uid(0x004dd072, 0xffffffef, ar8035_phy_fixup); + + imx6_bbu_internal_mmc_register_handler("emmc", "/dev/mmc3.barebox", + BBU_HANDLER_FLAG_DEFAULT, NULL, 0, 0); + + return 0; +} +device_initcall(riotboard_device_init); + +static int riotboard_lwl_init(void) +{ + if (!of_machine_is_compatible("embest,riotboard")) + return 0; + + barebox_set_hostname("riotboard"); + + imx6_init_lowlevel(); + + return 0; +} +postcore_initcall(riotboard_lwl_init); diff --git a/arch/arm/boards/embest-riotboard/flash-header-embest-riotboard.imxcfg b/arch/arm/boards/embest-riotboard/flash-header-embest-riotboard.imxcfg new file mode 100644 index 0000000..04e162b --- /dev/null +++ b/arch/arm/boards/embest-riotboard/flash-header-embest-riotboard.imxcfg @@ -0,0 +1,62 @@ +loadaddr 0x20000000 +soc imx6 +dcdofs 0x400 +wm 32 0x020e0774 0x000c0000 +wm 32 0x020e0754 0x00000000 +wm 32 0x020e04ac 0x00000030 +wm 32 0x020e04b0 0x00000030 +wm 32 0x020e0464 0x00000030 +wm 32 0x020e0490 0x00000030 +wm 32 0x020e074c 0x00000030 +wm 32 0x020e0494 0x00000030 +wm 32 0x020e04a0 0x00000000 +wm 32 0x020e04b4 0x00000030 +wm 32 0x020e04b8 0x00000030 +wm 32 0x020e076c 0x00000030 +wm 32 0x020e0750 0x00020000 +wm 32 0x020e04bc 0x00000028 +wm 32 0x020e04c0 0x00000028 +wm 32 0x020e04c4 0x00000028 +wm 32 0x020e04c8 0x00000028 +wm 32 0x020e0760 0x00020000 +wm 32 0x020e0764 0x00000028 +wm 32 0x020e0770 0x00000028 +wm 32 0x020e0778 0x00000028 +wm 32 0x020e077c 0x00000028 +wm 32 0x020e0470 0x00000028 +wm 32 0x020e0474 0x00000028 +wm 32 0x020e0478 0x00000028 +wm 32 0x020e047c 0x00000028 +wm 32 0x021b0800 0xa1390003 +wm 32 0x021b080c 0x001f001f +wm 32 0x021b0810 0x001f001f +wm 32 0x021b083c 0x421c0216 +wm 32 0x021b0840 0x017b017a +wm 32 0x021b0848 0x4b4a4e4c +wm 32 0x021b0850 0x3f3f3334 +wm 32 0x021b081c 0x33333333 +wm 32 0x021b0820 0x33333333 +wm 32 0x021b0824 0x33333333 +wm 32 0x021b0828 0x33333333 +wm 32 0x021b08b8 0x00000800 +wm 32 0x021b0004 0x00020025 +wm 32 0x021b0008 0x00333030 +wm 32 0x021b000c 0x676b5313 +wm 32 0x021b0010 0xb66e8b63 +wm 32 0x021b0014 0x01ff00db +wm 32 0x021b0018 0x00001740 +wm 32 0x021b001c 0x00008000 +wm 32 0x021b002c 0x000026d2 +wm 32 0x021b0030 0x006b1023 +wm 32 0x021b0040 0x00000027 +wm 32 0x021b0000 0x84190000 +wm 32 0x021b001c 0x04008032 +wm 32 0x021b001c 0x00008033 +wm 32 0x021b001c 0x00048031 +wm 32 0x021b001c 0x05208030 +wm 32 0x021b001c 0x04008040 +wm 32 0x021b0020 0x00005800 +wm 32 0x021b0818 0x00011117 +wm 32 0x021b0004 0x00025565 +wm 32 0x021b0404 0x00011006 +wm 32 0x021b001c 0x00000000 diff --git a/arch/arm/boards/embest-riotboard/lowlevel.c b/arch/arm/boards/embest-riotboard/lowlevel.c new file mode 100644 index 0000000..814658a --- /dev/null +++ b/arch/arm/boards/embest-riotboard/lowlevel.c @@ -0,0 +1,43 @@ +#include <debug_ll.h> +#include <common.h> +#include <sizes.h> +#include <io.h> +#include <asm/barebox-arm-head.h> +#include <asm/barebox-arm.h> +#include <asm/sections.h> +#include <asm/cache.h> +#include <asm/mmu.h> +#include <mach/imx6-mmdc.h> +#include <mach/imx6.h> + +static inline void setup_uart(void) +{ + /* Enable UART for lowlevel debugging purposes */ + writel(0x00000000, 0x021e8080); + writel(0x00004027, 0x021e8084); + writel(0x00000704, 0x021e8088); + writel(0x00000a81, 0x021e8090); + writel(0x0000002b, 0x021e809c); + writel(0x00013880, 0x021e80b0); + writel(0x0000047f, 0x021e80a4); + writel(0x0000c34f, 0x021e80a8); + writel(0x00000001, 0x021e8080); +} + +extern char __dtb_imx6s_riotboard_start[]; + +ENTRY_FUNCTION(start_imx6s_riotboard, r0, r1, r2) +{ + uint32_t fdt; + + arm_cpu_lowlevel_init(); + + if (IS_ENABLED(CONFIG_DEBUG_LL)) { + writel(0x4, 0x020e016c); + setup_uart(); + putc_ll('a'); + } + + fdt = (uint32_t)__dtb_imx6s_riotboard_start - get_runtime_offset(); + barebox_arm_entry(0x10000000, SZ_1G, fdt); +} diff --git a/arch/arm/configs/imx_v7_defconfig b/arch/arm/configs/imx_v7_defconfig index f29c968..2c97512 100644 --- a/arch/arm/configs/imx_v7_defconfig +++ b/arch/arm/configs/imx_v7_defconfig @@ -15,6 +15,7 @@ CONFIG_MACH_SABRELITE=y CONFIG_MACH_SABRESD=y CONFIG_MACH_NITROGEN6X=y CONFIG_MACH_SOLIDRUN_HUMMINGBOARD=y +CONFIG_MACH_EMBEST_RIOTBOARD=y CONFIG_MACH_UDOO=y CONFIG_MACH_VARISCITE_MX6=y CONFIG_IMX_IIM=y diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index b45c174..e7f9b80 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -27,7 +27,8 @@ dtb-$(CONFIG_ARCH_IMX6) += imx6q-gk802.dtb \ imx6q-nitrogen6x.dtb \ imx6dl-nitrogen6x.dtb \ imx6q-udoo.dtb \ - imx6q-var-custom.dtb + imx6q-var-custom.dtb \ + imx6s-riotboard.dtb dtb-$(CONFIG_ARCH_MVEBU) += dove-cubox-bb.dtb dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_cyclone5_sockit.dtb \ socfpga_cyclone5_socrates.dtb @@ -40,6 +41,7 @@ obj-$(CONFIG_BUILTIN_DTB) += $(BUILTIN_DTB).dtb.o pbl-$(CONFIG_MACH_BEAGLEBONE) += am335x-bone.dtb.o am335x-boneblack.dtb.o pbl-$(CONFIG_MACH_EFIKA_MX_SMARTBOOK) += imx51-genesi-efika-sb.dtb.o +pbl-$(CONFIG_MACH_EMBEST_RIOTBOARD) += imx6s-riotboard.dtb.o pbl-$(CONFIG_MACH_FREESCALE_MX51_PDK) += imx51-babbage.dtb.o pbl-$(CONFIG_MACH_FREESCALE_MX53_LOCO) += imx53-qsb.dtb.o imx53-qsrb.dtb.o pbl-$(CONFIG_MACH_FREESCALE_MX53_VMX53) += imx53-voipac-bsb.dtb.o diff --git a/arch/arm/dts/imx6s-riotboard.dts b/arch/arm/dts/imx6s-riotboard.dts new file mode 100644 index 0000000..14d0b80 --- /dev/null +++ b/arch/arm/dts/imx6s-riotboard.dts @@ -0,0 +1,391 @@ +/* + * Copyright (C) 2014 Eric Bénard - Eukréa Electromatique + * + * The code contained herein is licensed under the GNU General Public + * License version 2. + */ +/dts-v1/; + +#include "imx6dl.dtsi" + +/ { + model = "RIoTboard Solo"; + compatible = "embest,riotboard", "fsl,imx6dl"; + + chosen { + linux,stdout-path = &uart2; + + environment@0 { + compatible = "barebox,environment"; + device-path = &usdhc4, "partname:barebox-environment"; + }; + }; + + memory { + reg = <0x10000000 0x40000000>; + }; + + gpio-leds { + compatible = "gpio-leds"; + + d45 { + label = "d45"; + gpios = <&gpio5 2 1>; + linux,default-trigger = "heartbeat"; + }; + + d46 { + label = "d46"; + gpios = <&gpio3 28 1>; + linux,default-trigger = "default-on"; + }; + }; + + + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + reg_3p3v: regulator@1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + }; +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hog>; + + imx6s-riotboard { + pinctrl_hog: hoggrp { + fsl,pins = < + MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000 /* LED D45 */ + MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x80000000 /* LED D46 */ + MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16 0x80000000 /* PMIC_INT_B */ + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x030b0 /* CAM_MCLK + SGTL_MCLK */ + >; + }; + pinctrl_uart2: uart2grp { + fsl,pins = <MX6QDL_UART2_PINGRP1>; + }; + pinctrl_rgmii_ar8035: rgmii_ar8035 { + fsl,pins = < + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 + /* AR8035 reset */ + MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x130b0 + /* AR8035 interrupt */ + MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 + /* GPIO16 -> AR8035 25MHz */ + MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0xc0000000 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x80000000 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 + /* AR8035 CLK_25M --> ENET_REF_CLK (V22) */ + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x0a0b1 + /* AR8035 pin strapping: IO voltage: pull up */ + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 + /* AR8035 pin strapping: PHYADDR#0: pull down */ + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x130b0 + /* AR8035 pin strapping: PHYADDR#1: pull down */ + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x130b0 + /* AR8035 pin strapping: MODE#1: pull up */ + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 + /* AR8035 pin strapping: MODE#3: pull up */ + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 + /* AR8035 pin strapping: MODE#0: pull down */ + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x130b0 + >; + }; + pinctrl_usdhc4: usdhc4grp { + fsl,pins = < + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x80000000 + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x80000000 + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x80000000 + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x80000000 + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x80000000 + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x80000000 + >; + }; + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX6QDL_PAD_SD2_CLK__SD2_CLK 0x80000000 + MX6QDL_PAD_SD2_CMD__SD2_CMD 0x80000000 + MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x80000000 + MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x80000000 + MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x80000000 + MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x80000000 + MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x80000000 + >; + }; + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x80000000 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x80000000 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x80000000 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x80000000 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x80000000 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x80000000 + MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x80000000 + MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000 + >; + }; + pinctrl_usbotg: usbotggrp { + fsl,pins = < + MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x80000000 + MX6QDL_PAD_EIM_D22__USB_OTG_PWR 0x80000000 + MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x80000000 + >; + }; + pinctrl_i2c1_2: i2c1grp-2 { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1 + MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1 + >; + }; + pinctrl_i2c2_2: i2c2grp-2 { + fsl,pins = < + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 + >; + }; + pinctrl_i2c3_2: i2c3grp-2 { + fsl,pins = < + MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1 + MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 + >; + }; + pinctrl_i2c4_2: i2c4grp-2 { + fsl,pins = < + MX6QDL_PAD_GPIO_7__I2C4_SCL 0x4001b8b1 + MX6QDL_PAD_GPIO_8__I2C4_SDA 0x4001b8b1 + >; + }; + }; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + status = "okay"; +}; + +&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rgmii_ar8035>; + phy-mode = "rgmii"; + phy-reset-duration = <2>; + phy-reset-gpios = <&gpio3 31 0>; + status = "okay"; +}; + +&usdhc2 { + /* SD card socket - bottom */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2>; + bus-width = <4>; + cd-gpios = <&gpio1 4 0>; + wp-gpios = <&gpio1 2 0>; + status = "okay"; + #address-cells = <1>; + #size-cells = <1>; +}; + +&usdhc3 { + /* uSD card socket - top */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc3>; + bus-width = <4>; + cd-gpios = <&gpio7 0 0>; + wp-gpios = <&gpio7 1 0>; + status = "okay"; + #address-cells = <1>; + #size-cells = <1>; +}; + +&usdhc4 { + /* eMMC */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc4>; + bus-width = <4>; + non-removable; + status = "okay"; + + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "barebox"; + reg = <0x0 0x80000>; + }; + + partition@1 { + label = "barebox-environment"; + reg = <0x80000 0x80000>; + }; +}; + +&usbh1 { + status = "okay"; + phy_type = "utmi"; + disable-over-current; +}; + +&usbotg { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbotg>; + phy_type = "utmi"; + dr_mode = "peripheral"; + otg_id_pin_select_change; + status = "okay"; +}; + +&i2c1 { + status = "okay"; + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1_2>; + + pmic: pf0100@08 { + compatible = "pf0100-regulator"; + reg = <0x08>; + interrupt-parent = <&gpio5>; + interrupts = <16 8>; + + regulators { + reg_vddcore: sw1ab { + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1875000>; + regulator-always-on; + }; + + reg_vddsoc: sw1c { + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1875000>; + regulator-always-on; + }; + + reg_gen_3v3: sw2 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + reg_ddr_1v5a: sw3a { + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1975000>; + regulator-always-on; + }; + + reg_ddr_1v5b: sw3b { + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1975000>; + regulator-always-on; + }; + + reg_ddr_vtt: sw4 { + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1975000>; + regulator-always-on; + }; + + reg_5v_600mA: swbst { + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5150000>; + regulator-always-on; + }; + + reg_snvs_3v: vsnvs { + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + }; + + reg_vrefddr: vrefddr { + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <750000>; + regulator-always-on; + }; + + reg_vgen1_1v5: vgen1 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1550000>; + /* not used */ + }; + + reg_vgen2_1v2_eth: vgen2 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1550000>; + regulator-always-on; + }; + + reg_vgen3_2v8: vgen3 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + reg_vgen4_1v8: vgen4 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + reg_vgen5_2v5_sgtl: vgen5 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + reg_vgen6_3v3: vgen6 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + }; + }; + + codec: sgtl5000@0a { + compatible = "fsl,sgtl5000"; + reg = <0x0a>; + clocks = <&clks 201>; + VDDA-supply = <®_vgen5_2v5_sgtl>; + VDDIO-supply = <®_3p3v>; + }; +}; + +&i2c2 { + status = "okay"; + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2_2>; +}; + +&i2c3 { + status = "okay"; + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3_2>; +}; + +&i2c4 { + status = "okay"; + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c4_2>; +}; + +&ocotp { + barebox,provide-mac-address = <&fec 0x620>; +}; + diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index d40c944..40c07f4 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -250,6 +250,10 @@ config MACH_SOLIDRUN_HUMMINGBOARD bool "SolidRun Hummingboard" select ARCH_IMX6 +config MACH_EMBEST_RIOTBOARD + bool "Embest RIoTboard" + select ARCH_IMX6 + config MACH_UDOO bool "Freescale i.MX6 UDOO Board" select ARCH_IMX6 diff --git a/images/Makefile.imx b/images/Makefile.imx index 06794fd..17fcfbf 100644 --- a/images/Makefile.imx +++ b/images/Makefile.imx @@ -166,3 +166,8 @@ pblx-$(CONFIG_MACH_VARISCITE_MX6) += start_variscite_custom CFG_start_variscite_custom.pblx.imximg = $(board)/variscite-mx6/flash-header-variscite.imxcfg FILE_barebox-variscite-custom.img = start_variscite_custom.pblx.imximg image-$(CONFIG_MACH_VARISCITE_MX6) += barebox-variscite-custom.img + +pblx-$(CONFIG_MACH_EMBEST_RIOTBOARD) += start_imx6s_riotboard +CFG_start_imx6s_riotboard.pblx.imximg = $(board)/embest-riotboard/flash-header-embest-riotboard.imxcfg +FILE_barebox-embest-imx6s-riotboard.img = start_imx6s_riotboard.pblx.imximg +image-$(CONFIG_MACH_EMBEST_RIOTBOARD) += barebox-embest-imx6s-riotboard.img -- 1.9.0 _______________________________________________ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
