Added settings for 1GB RAM option.

Signed-off-by: Teresa Gámez <t.ga...@phytec.de>
---
 arch/arm/boards/phytec-phycore-am335x/lowlevel.c |   25 ++++++++++++++++++++++
 images/Makefile.am33xx                           |    4 +++
 2 files changed, 29 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boards/phytec-phycore-am335x/lowlevel.c 
b/arch/arm/boards/phytec-phycore-am335x/lowlevel.c
index a15e151..66bae80 100644
--- a/arch/arm/boards/phytec-phycore-am335x/lowlevel.c
+++ b/arch/arm/boards/phytec-phycore-am335x/lowlevel.c
@@ -36,6 +36,7 @@ enum {
        MT41J128M16125IT_256MB,
        MT41J64M1615IT_128MB,
        MT41J256M16HA15EIT_512MB,
+       MT41J512M8125IT_2x512MB,
 };
 
 struct pcm051_sdram_timings timings[] = {
@@ -95,6 +96,25 @@ struct pcm051_sdram_timings timings[] = {
                        .wr_slave_ratio0        = 0x7b,
                },
        },
+
+       /* 1024MB */
+       [MT41J512M8125IT_2x512MB] = {
+               .regs = {
+                       .emif_read_latency      = 0x7,
+                       .emif_tim1              = 0x0AAAE4DB,
+                       .emif_tim2              = 0x266B7FDA,
+                       .emif_tim3              = 0x501F867F,
+                       .sdram_config           = 0x61C053B2,
+                       .zq_config              = 0x50074BE4,
+                       .sdram_ref_ctrl         = 0x00000C30
+               },
+               .data = {
+                       .rd_slave_ratio0        = 0x32,
+                       .wr_dqs_slave_ratio0    = 0x48,
+                       .fifo_we_slave_ratio0   = 0x99,
+                       .wr_slave_ratio0        = 0x80,
+               },
+       },
 };
 
 extern char __dtb_am335x_phytec_phycore_start[];
@@ -169,6 +189,11 @@ ENTRY_FUNCTION(start_am33xx_phytec_phycore_sram_512mb, 
bootinfo, r1, r2)
        pcm051_board_entry(bootinfo, MT41J256M16HA15EIT_512MB);
 }
 
+ENTRY_FUNCTION(start_am33xx_phytec_phycore_sram_2x512mb, bootinfo, r1, r2)
+{
+       pcm051_board_entry(bootinfo, MT41J512M8125IT_2x512MB);
+}
+
 ENTRY_FUNCTION(start_am33xx_phytec_phycore_sdram, r0, r1, r2)
 {
        void *fdt;
diff --git a/images/Makefile.am33xx b/images/Makefile.am33xx
index c1f19c1..d24338e 100644
--- a/images/Makefile.am33xx
+++ b/images/Makefile.am33xx
@@ -23,6 +23,10 @@ pblx-$(CONFIG_MACH_PCM051) += 
start_am33xx_phytec_phycore_sram_512mb
 FILE_barebox-am33xx-phytec-phycore-mlo-512mb.img = 
start_am33xx_phytec_phycore_sram_512mb.pblx.mlo
 am33xx-mlo-$(CONFIG_MACH_PCM051) += barebox-am33xx-phytec-phycore-mlo-512mb.img
 
+pblx-$(CONFIG_MACH_PCM051) += start_am33xx_phytec_phycore_sram_2x512mb
+FILE_barebox-am33xx-phytec-phycore-mlo-2x512mb.img = 
start_am33xx_phytec_phycore_sram_2x512mb.pblx.mlo
+am33xx-mlo-$(CONFIG_MACH_PCM051) += 
barebox-am33xx-phytec-phycore-mlo-2x512mb.img
+
 pblx-$(CONFIG_MACH_BEAGLEBONE) += start_am33xx_beaglebone_sdram
 FILE_barebox-am33xx-beaglebone.img = start_am33xx_beaglebone_sdram.pblx
 am33xx-barebox-$(CONFIG_MACH_BEAGLEBONE) += barebox-am33xx-beaglebone.img
-- 
1.7.0.4


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