The Reflex Achilles has 2 ethernet ports. Enable the second one, too.
Signed-off-by: Steffen Trumtrar <[email protected]>
---
arch/arm/dts/socfpga_arria10_achilles.dts | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/arch/arm/dts/socfpga_arria10_achilles.dts
b/arch/arm/dts/socfpga_arria10_achilles.dts
index 908e929d9edf..176e06df12a5 100644
--- a/arch/arm/dts/socfpga_arria10_achilles.dts
+++ b/arch/arm/dts/socfpga_arria10_achilles.dts
@@ -174,6 +174,27 @@
status = "okay";
};
+&gmac2 {
+ phy-mode = "rgmii";
+ phy-addr = <0x3>;
+
+ status = "okay";
+
+ txd0-skew-ps = <0>; /* -420ps */
+ txd1-skew-ps = <0>; /* -420ps */
+ txd2-skew-ps = <0>; /* -420ps */
+ txd3-skew-ps = <0>; /* -420ps */
+ rxd0-skew-ps = <420>; /* 0ps */
+ rxd1-skew-ps = <420>; /* 0ps */
+ rxd2-skew-ps = <420>; /* 0ps */
+ rxd3-skew-ps = <420>; /* 0ps */
+ txen-skew-ps = <0>; /* -420ps */
+ txc-skew-ps = <1860>; /* 960ps */
+ rxdv-skew-ps = <420>; /* 0ps */
+ rxc-skew-ps = <1680>; /* 780ps */
+ max-frame-size = <3800>;
+};
+
&i2c0 {
status = "okay";
--
2.19.0
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