This comment refers to the state of things prior to e3e54c644
("ARM: mmu: Implement on-demand PTE allocation"). Since then, we no
longer generate 2nd level page tables directly below. Remove it
to avoid confusion.
Cc: Lucas Stach <l.st...@pengutronix.de>
Signed-off-by: Ahmad Fatoum <a.fat...@pengutronix.de>
---
arch/arm/cpu/mmu.c | 5 -----
1 file changed, 5 deletions(-)
diff --git a/arch/arm/cpu/mmu.c b/arch/arm/cpu/mmu.c
index 2c5c4b574928..158b130b5765 100644
--- a/arch/arm/cpu/mmu.c
+++ b/arch/arm/cpu/mmu.c
@@ -461,11 +461,6 @@ void __mmu_init(bool mmu_on)
vectors_init();
- /*
- * First remap sdram cached using sections.
- * This is to speed up the generation of 2nd level page tables
- * below
- */
for_each_memory_bank(bank) {
create_sections(ttb, bank->start, bank->start + bank->size - 1,
PMD_SECT_DEF_CACHED);
--
2.23.0
_______________________________________________
barebox mailing list
barebox@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/barebox
