On Thu, Feb 25, 2021 at 08:39:20PM +0300, Antony Pavlov wrote:
> On Thu, 25 Feb 2021 16:33:06 +0100
> Ahmad Fatoum <[email protected]> wrote:
> 
> > Hello,
> > 
> > On 25.02.21 14:02, Jules Maselbas wrote:
> > > On Thu, Feb 25, 2021 at 09:45:00PM +0900, Stafford Horne wrote:
> > >> Hello,
> > >>
> > >> I am the maintainer of most OpenRISC things right now.  I would be happy 
> > >> to
> > >> help, but I don't really use barebox right now.  Most of my deployments 
> > >> I use
> > >> with litex FPGA SoC's that has its own bootloader.
> > >>
> 
> There is barebox for litex SoC with RISC-V CPU core, please see:
> 
> https://github.com/enjoy-digital/litex/issues/413#issuecomment-609047340

Hi Antony,

Great thanks, I see that is a two stage bootloader Litex BIOS -> Barebox.
That's great and gives me an easier target.

-Stafford

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