I got the uart1 and uart4 available on boot after I changed the appropiate dtsi in this way:
--- arch/arm/boot/dts/am335x-bone-common.dtsi_ORIG 2021-01-29
15:08:15.085080693 +0100
+++ arch/arm/boot/dts/am335x-bone-common.dtsi 2021-06-22 11:26:48.197115876
+0200
@@ -96,6 +96,20 @@
>;
};
+ uart1_pins: pinmux_uart1_pins {
+ pinctrl-single,pins = <
+ AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLUP,
MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_UART1_TXD,
PIN_OUTPUT_PULLDOWN, MUX_MODE0)
+ >;
+ };
+
+ uart4_pins: pinmux_uart4_pins {
+ pinctrl-single,pins = <
+ AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE6)
/* (T17) gpmc_wait0.uart4_rxd */
+ AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_OUTPUT_PULLDOWN,
MUX_MODE6) /* (U17) gpmc_wpn.uart4_txd */
+ >;
+ };
+
clkout2_pin: pinmux_clkout2_pin {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1,
PIN_OUTPUT_PULLDOWN, MUX_MODE3) /* xdma_event_intr1.clkout2 */
@@ -190,6 +204,20 @@
status = "okay";
};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>;
+
+ status = "okay";
+};
+
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart4_pins>;
+
+ status = "okay";
+};
&usb {
status = "okay”;
This change is activating and enabling those uarts at boot and does pin muxing
properly.
It’s not muxing only as I previously assumed wrongly investigating the initial
overlays.
I will go with that and if in future it is required programming proper overlays
for
this that will be a side quest unrelated to barebox.
I just put a result into this mail thread if someone stumbles upon this.
Kind Regards
Konsti
smime.p7s
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