Upstream will soon switch the rave-sp nodes to be called mcu instead, which will break our usage. Anticipate this by using references.
Signed-off-by: Ahmad Fatoum <[email protected]> --- arch/arm/dts/imx51-zii-rdu1.dts | 151 +++++++++++++---------------- arch/arm/dts/imx6qdl-zii-rdu2.dtsi | 59 +++++------ arch/arm/dts/imx7d-zii-rmu2.dts | 49 ++++------ arch/arm/dts/imx8mq-zii-ultra.dtsi | 38 ++++---- 4 files changed, 127 insertions(+), 170 deletions(-) diff --git a/arch/arm/dts/imx51-zii-rdu1.dts b/arch/arm/dts/imx51-zii-rdu1.dts index 7f6a2962b4f0..72f5484bc0fd 100644 --- a/arch/arm/dts/imx51-zii-rdu1.dts +++ b/arch/arm/dts/imx51-zii-rdu1.dts @@ -53,33 +53,31 @@ * the switch shared DT node with it, so we use that * fact to create a desirable naming */ - switch-eeprom = &switch; - microwire-eeprom = µwire_eeprom; + switch-eeprom = &{mdio_gpio/switch@0}; + microwire-eeprom = &{spi_gpio/eeprom@0}; }; }; -&ecspi1 { - spinor: flash@1 { - partition@0 { - /* - * Do not change the size of this - * partition. RDU1's BBU code relies on - * "barebox" partition starting at 1024 byte - * mark to function properly - */ - label = "config"; - reg = <0x0 0x400>; - }; +spinor: &{ecspi1/flash@1} { + partition@0 { + /* + * Do not change the size of this + * partition. RDU1's BBU code relies on + * "barebox" partition starting at 1024 byte + * mark to function properly + */ + label = "config"; + reg = <0x0 0x400>; + }; - partition@400 { - label = "barebox"; - reg = <0x400 0xdfc00>; - }; + partition@400 { + label = "barebox"; + reg = <0x400 0xdfc00>; + }; - env_spinor: partition@e0000 { - label = "barebox-environment"; - reg = <0xe0000 0x20000>; - }; + env_spinor: partition@e0000 { + label = "barebox-environment"; + reg = <0xe0000 0x20000>; }; }; @@ -99,33 +97,21 @@ }; }; -&mdio_gpio { - switch: switch@0 {}; +&{uart3/rave-sp/watchdog} { + nvmem-cells = <&boot_source>; + nvmem-cell-names = "boot-source"; }; -&spi_gpio { - microwire_eeprom: eeprom@0 {}; -}; - -&uart3 { - rave-sp { - watchdog { - nvmem-cells = <&boot_source>; - nvmem-cell-names = "boot-source"; - }; +&{uart3/rave-sp/eeprom@a4} { + nvmem-cells = <&shadow_config>; + nvmem-cell-names = "shadow-config"; - eeprom@a4 { - nvmem-cells = <&shadow_config>; - nvmem-cell-names = "shadow-config"; - - boot_source: boot-source@83 { - reg = <0x83 1>; - }; + boot_source: boot-source@83 { + reg = <0x83 1>; + }; - shadow_config: shadow-config@1000 { - reg = <0x1000 0x400>; - }; - }; + shadow_config: shadow-config@1000 { + reg = <0x1000 0x400>; }; }; @@ -133,44 +119,41 @@ status = "disabled"; }; -&iomuxc { - pinctrl_usbh1: usbh1grp { - - /* - * Overwrite upstream USBH1,2 iomux settings to match - * the setting U-Boot would set these to. Remove this - * once this is fixed upstream. - */ - fsl,pins = < - MX51_PAD_USBH1_STP__USBH1_STP 0x1e5 - MX51_PAD_USBH1_CLK__USBH1_CLK 0x1e5 - MX51_PAD_USBH1_DIR__USBH1_DIR 0x1e5 - MX51_PAD_USBH1_NXT__USBH1_NXT 0x1e5 - MX51_PAD_USBH1_DATA0__USBH1_DATA0 0x1e5 - MX51_PAD_USBH1_DATA1__USBH1_DATA1 0x1e5 - MX51_PAD_USBH1_DATA2__USBH1_DATA2 0x1e5 - MX51_PAD_USBH1_DATA3__USBH1_DATA3 0x1e5 - MX51_PAD_USBH1_DATA4__USBH1_DATA4 0x1e5 - MX51_PAD_USBH1_DATA5__USBH1_DATA5 0x1e5 - MX51_PAD_USBH1_DATA6__USBH1_DATA6 0x1e5 - MX51_PAD_USBH1_DATA7__USBH1_DATA7 0x1e5 - >; - }; +&pinctrl_usbh1 { + /* + * Overwrite upstream USBH1,2 iomux settings to match + * the setting U-Boot would set these to. Remove this + * once this is fixed upstream. + */ + fsl,pins = < + MX51_PAD_USBH1_STP__USBH1_STP 0x1e5 + MX51_PAD_USBH1_CLK__USBH1_CLK 0x1e5 + MX51_PAD_USBH1_DIR__USBH1_DIR 0x1e5 + MX51_PAD_USBH1_NXT__USBH1_NXT 0x1e5 + MX51_PAD_USBH1_DATA0__USBH1_DATA0 0x1e5 + MX51_PAD_USBH1_DATA1__USBH1_DATA1 0x1e5 + MX51_PAD_USBH1_DATA2__USBH1_DATA2 0x1e5 + MX51_PAD_USBH1_DATA3__USBH1_DATA3 0x1e5 + MX51_PAD_USBH1_DATA4__USBH1_DATA4 0x1e5 + MX51_PAD_USBH1_DATA5__USBH1_DATA5 0x1e5 + MX51_PAD_USBH1_DATA6__USBH1_DATA6 0x1e5 + MX51_PAD_USBH1_DATA7__USBH1_DATA7 0x1e5 + >; +}; - pinctrl_usbh2: usbh2grp { - fsl,pins = < - MX51_PAD_EIM_A26__USBH2_STP 0x1e5 - MX51_PAD_EIM_A24__USBH2_CLK 0x1e5 - MX51_PAD_EIM_A25__USBH2_DIR 0x1e5 - MX51_PAD_EIM_A27__USBH2_NXT 0x1e5 - MX51_PAD_EIM_D16__USBH2_DATA0 0x1e5 - MX51_PAD_EIM_D17__USBH2_DATA1 0x1e5 - MX51_PAD_EIM_D18__USBH2_DATA2 0x1e5 - MX51_PAD_EIM_D19__USBH2_DATA3 0x1e5 - MX51_PAD_EIM_D20__USBH2_DATA4 0x1e5 - MX51_PAD_EIM_D21__USBH2_DATA5 0x1e5 - MX51_PAD_EIM_D22__USBH2_DATA6 0x1e5 - MX51_PAD_EIM_D23__USBH2_DATA7 0x1e5 - >; - }; +&pinctrl_usbh2 { + fsl,pins = < + MX51_PAD_EIM_A26__USBH2_STP 0x1e5 + MX51_PAD_EIM_A24__USBH2_CLK 0x1e5 + MX51_PAD_EIM_A25__USBH2_DIR 0x1e5 + MX51_PAD_EIM_A27__USBH2_NXT 0x1e5 + MX51_PAD_EIM_D16__USBH2_DATA0 0x1e5 + MX51_PAD_EIM_D17__USBH2_DATA1 0x1e5 + MX51_PAD_EIM_D18__USBH2_DATA2 0x1e5 + MX51_PAD_EIM_D19__USBH2_DATA3 0x1e5 + MX51_PAD_EIM_D20__USBH2_DATA4 0x1e5 + MX51_PAD_EIM_D21__USBH2_DATA5 0x1e5 + MX51_PAD_EIM_D22__USBH2_DATA6 0x1e5 + MX51_PAD_EIM_D23__USBH2_DATA7 0x1e5 + >; }; diff --git a/arch/arm/dts/imx6qdl-zii-rdu2.dtsi b/arch/arm/dts/imx6qdl-zii-rdu2.dtsi index 994e43b53b64..2e6a74dde019 100644 --- a/arch/arm/dts/imx6qdl-zii-rdu2.dtsi +++ b/arch/arm/dts/imx6qdl-zii-rdu2.dtsi @@ -178,34 +178,27 @@ }; }; -&uart4 { - rave-sp { - #address-cells = <1>; - #size-cells = <1>; - - watchdog { - nvmem-cells = <&boot_source>; - nvmem-cell-names = "boot-source"; - }; +&{uart4/rave-sp/watchdog} { + nvmem-cells = <&boot_source>; + nvmem-cell-names = "boot-source"; +}; - eeprom@a4 { - lru_part_number: lru-part-number@21 { - reg = <0x21 15>; - read-only; - }; +&{uart4/rave-sp/eeprom@a4} { + lru_part_number: lru-part-number@21 { + reg = <0x21 15>; + read-only; + }; - boot_source: boot-source@83 { - reg = <0x83 1>; - }; + boot_source: boot-source@83 { + reg = <0x83 1>; + }; - mac_address_0: mac-address@180 { - reg = <0x180 6>; - }; + mac_address_0: mac-address@180 { + reg = <0x180 6>; + }; - mac_address_1: mac-address@190 { - reg = <0x190 6>; - }; - }; + mac_address_1: mac-address@190 { + reg = <0x190 6>; }; }; @@ -231,22 +224,16 @@ nvmem-cell-names = "mac-address"; }; -&i2c1 { - edp-bridge@68 { - pinctrl-0 = <&pinctrl_tc358767>, <&pinctrl_disp0>; - }; +&{i2c1/edp-bridge@68} { + pinctrl-0 = <&pinctrl_tc358767>, <&pinctrl_disp0>; }; -&i2c2 { - temp-sense@48 { - barebox,sensor-name = "Temp Sensor 1"; - }; +&{i2c2/temp-sense@48} { + barebox,sensor-name = "Temp Sensor 1"; }; -&ldb { - lvds-channel@0 { - fsl,data-width = <24>; - }; +&{ldb/lvds-channel@0} { + fsl,data-width = <24>; }; &i210 { diff --git a/arch/arm/dts/imx7d-zii-rmu2.dts b/arch/arm/dts/imx7d-zii-rmu2.dts index 41566f54a112..17d625b83e23 100644 --- a/arch/arm/dts/imx7d-zii-rmu2.dts +++ b/arch/arm/dts/imx7d-zii-rmu2.dts @@ -18,37 +18,28 @@ /delete-property/ assigned-clock-parents; }; -&ecspi1 { - nor_flash: flash@0 { - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "barebox"; - reg = <0x0 0xc0000>; - }; - - partition@c0000 { - label = "barebox-environment"; - reg = <0xc0000 0x40000>; - }; +nor_flash: &{ecspi1/flash@0} { + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "barebox"; + reg = <0x0 0xc0000>; + }; + + partition@c0000 { + label = "barebox-environment"; + reg = <0xc0000 0x40000>; }; }; -&uart4 { - rave-sp { - #address-cells = <1>; - #size-cells = <1>; - - watchdog { - nvmem-cells = <&boot_source>; - nvmem-cell-names = "boot-source"; - }; - - eeprom@a3 { - boot_source: boot-source@83 { - reg = <0x83 1>; - }; - }; +&{uart4/rave-sp/watchdog} { + nvmem-cells = <&boot_source>; + nvmem-cell-names = "boot-source"; +}; + +&{uart4/rave-sp/eeprom@a3} { + boot_source: boot-source@83 { + reg = <0x83 1>; }; }; diff --git a/arch/arm/dts/imx8mq-zii-ultra.dtsi b/arch/arm/dts/imx8mq-zii-ultra.dtsi index dc6d743f29cd..27ffebc154f4 100644 --- a/arch/arm/dts/imx8mq-zii-ultra.dtsi +++ b/arch/arm/dts/imx8mq-zii-ultra.dtsi @@ -64,31 +64,27 @@ nvmem-cell-names = "mac-address"; }; -&uart2 { - rave-sp { - watchdog { - nvmem-cells = <&boot_source>; - nvmem-cell-names = "boot-source"; - }; +&{uart2/rave-sp/watchdog} { + nvmem-cells = <&boot_source>; + nvmem-cell-names = "boot-source"; +}; - eeprom@a4 { - lru_part_number: lru-part-number@21 { - reg = <0x21 15>; - read-only; - }; +&{uart2/rave-sp/eeprom@a4} { + lru_part_number: lru-part-number@21 { + reg = <0x21 15>; + read-only; + }; - boot_source: boot-source@83 { - reg = <0x83 1>; - }; + boot_source: boot-source@83 { + reg = <0x83 1>; + }; - mac_address_0: mac-address@180 { - reg = <0x180 6>; - }; + mac_address_0: mac-address@180 { + reg = <0x180 6>; + }; - mac_address_1: mac-address@190 { - reg = <0x190 6>; - }; - }; + mac_address_1: mac-address@190 { + reg = <0x190 6>; }; }; -- 2.30.2
