This is a preparation for using two level page tables in the PBL.
To do that we need a way to allocate page tables in PBL. As malloc
is not available in PBL, implement a function to allocate a page table
from the area we also place the TTB.

Signed-off-by: Sascha Hauer <s.ha...@pengutronix.de>
---
 arch/arm/cpu/mmu_32.c | 24 ++++++++++++++++++++++--
 1 file changed, 22 insertions(+), 2 deletions(-)

diff --git a/arch/arm/cpu/mmu_32.c b/arch/arm/cpu/mmu_32.c
index 4050d96846..a82382ad1e 100644
--- a/arch/arm/cpu/mmu_32.c
+++ b/arch/arm/cpu/mmu_32.c
@@ -76,6 +76,27 @@ static bool pgd_type_table(u32 pgd)
        return (pgd & PMD_TYPE_MASK) == PMD_TYPE_TABLE;
 }
 
+#define PTE_SIZE       (PTRS_PER_PTE * sizeof(u32))
+
+#ifdef __PBL__
+static uint32_t *alloc_pte(void)
+{
+       static unsigned int idx = 3;
+
+       idx++;
+
+       if (idx * PTE_SIZE >= ARM_EARLY_PAGETABLE_SIZE)
+               return NULL;
+
+       return (void *)ttb + idx * PTE_SIZE;
+}
+#else
+static uint32_t *alloc_pte(void)
+{
+       return xmemalign(PTE_SIZE, PTE_SIZE);
+}
+#endif
+
 static u32 *find_pte(unsigned long adr)
 {
        u32 *table;
@@ -125,8 +146,7 @@ static u32 *arm_create_pte(unsigned long virt, uint32_t 
flags)
 
        virt = ALIGN_DOWN(virt, PGDIR_SIZE);
 
-       table = xmemalign(PTRS_PER_PTE * sizeof(u32),
-                         PTRS_PER_PTE * sizeof(u32));
+       table = alloc_pte();
 
        if (!ttb)
                arm_mmu_not_initialized_error();
-- 
2.39.2


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