We did not support non 1:1 mappings between CPU and PCI bus, so
we had to adjust the ranges property to be 1:1 instead to make
PCIe work on the Rock-5b board. This has been fixed now, so we can
remove the overwritten ranges property.
Signed-off-by: Sascha Hauer <s.ha...@pengutronix.de>
---
arch/arm/dts/rk3588-rock-5b.dts | 15 ---------------
1 file changed, 15 deletions(-)
diff --git a/arch/arm/dts/rk3588-rock-5b.dts b/arch/arm/dts/rk3588-rock-5b.dts
index ddff76028e..0af5442870 100644
--- a/arch/arm/dts/rk3588-rock-5b.dts
+++ b/arch/arm/dts/rk3588-rock-5b.dts
@@ -62,21 +62,6 @@ &pcie30phy {
status = "disabled";
};
-&pcie2x1l2 {
- /*
- * Originally in upstream dts this is:
- * ranges = <0x01000000 0x0 0xf4100000 0x0 0xf4100000 0x0 0x00100000>,
- * <0x02000000 0x0 0xf4200000 0x0 0xf4200000 0x0 0x00e00000>,
- * <0x03000000 0x0 0x40000000 0xa 0x00000000 0x0 0x40000000>;
- *
- * Overwriting this shouldn't be necessary, but without it PCI doesn't
- * work. We have some deficiency in the PCI driver that causes this.
- */
- ranges = <0x01000000 0x0 0xf4100000 0x0 0xf4100000 0x0 0x00100000>,
- <0x02000000 0x0 0xf4200000 0x0 0xf4200000 0x0 0x00e00000>,
- <0x03000000 0xa 0x00000000 0xa 0x00000000 0x0 0x40000000>;
-};
-
&pcie2x1l0 {
/* Does not work in barebox */
status = "disabled";
--
2.39.2
