From: Maud Spierings <[email protected]> Add an early exit to eqos_set_txclk() when the mode is (r)mii.
The "tx" clock is actually something called the "slice 81 clock" which must always be 50M for the rmii mode. This will later get divided into the actual tx clock /2 or /20 which does match those clock rates. Still the provided clock != tx clock when the mode is rmii. Linux also excludes the mii mode from this clock lookup, even though the clock rates actually seem to match there. I am not aware why it is also excluded, it may be best to wait with merging this until [1] has found an answer. But for now I thought it would be best to match Linux behaviour. Link: https://lore.kernel.org/all/[email protected]/ [1] Signed-off-by: Maud Spierings <[email protected]> Link: https://lore.barebox.org/[email protected] Signed-off-by: Sascha Hauer <[email protected]> (cherry picked from commit 7302e971fcd4153e7407db0abe6a1ddeb5f96f29) Signed-off-by: Ahmad Fatoum <[email protected]> --- drivers/net/designware_imx.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/net/designware_imx.c b/drivers/net/designware_imx.c index ec3558fad026..bc3136f8ff7e 100644 --- a/drivers/net/designware_imx.c +++ b/drivers/net/designware_imx.c @@ -59,10 +59,15 @@ static unsigned long eqos_get_csr_clk_rate_imx(struct eqos *eqos) static int eqos_set_txclk(struct eqos *eqos, int speed) { + phy_interface_t interface = eqos->interface; struct eqos_imx_priv *priv = eqos->priv; unsigned long rate; int ret; + if (interface == PHY_INTERFACE_MODE_RMII || + interface == PHY_INTERFACE_MODE_MII) + return 0; + switch (speed) { case SPEED_10: rate = 2500000; -- 2.47.3
