To allow generic code to remap memory as read-only, let's add the definition to the global header.
On platforms other than ARM, mapping R/O will just be cached R/W. Signed-off-by: Ahmad Fatoum <[email protected]> --- arch/Kconfig | 3 +++ arch/arm/Kconfig | 1 + arch/arm/cpu/mmu-common.c | 4 ++-- arch/arm/cpu/mmu-common.h | 3 +-- arch/arm/cpu/mmu_32.c | 4 ++-- arch/arm/cpu/mmu_64.c | 2 +- include/mmu.h | 6 ++++++ 7 files changed, 16 insertions(+), 7 deletions(-) diff --git a/arch/Kconfig b/arch/Kconfig index ca9aa25a9c4b..3daba5239740 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -62,6 +62,9 @@ config ARCH_DMA_DEFAULT_COHERENT config ARCH_HAS_DMA_WRITE_COMBINE bool +config ARCH_HAS_RO_MAPPINGS + bool + config ARCH_HAS_ASAN_FIBER_API bool diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 5123e9b1402c..d9b1f5de1fa7 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -17,6 +17,7 @@ config ARM select HAVE_ARCH_BOOTM_OFTREE select HW_HAS_PCI select ARCH_HAS_DMA_WRITE_COMBINE + select ARCH_HAS_RO_MAPPINGS select HAVE_EFI_LOADER if MMU # for payload unaligned accesses default y diff --git a/arch/arm/cpu/mmu-common.c b/arch/arm/cpu/mmu-common.c index a1431c0ff461..6db85fa9c7d4 100644 --- a/arch/arm/cpu/mmu-common.c +++ b/arch/arm/cpu/mmu-common.c @@ -22,7 +22,7 @@ const char *map_type_tostr(maptype_t map_type) switch (map_type) { case ARCH_MAP_CACHED_RWX: return "RWX"; - case ARCH_MAP_CACHED_RO: return "RO"; + case MAP_RO: return "RO"; case MAP_CACHED: return "CACHED"; case MAP_UNCACHED: return "UNCACHED"; case MAP_CODE: return "CODE"; @@ -158,7 +158,7 @@ static void mmu_remap_memory_banks(void) } remap_range((void *)code_start, code_size, MAP_CODE); - remap_range((void *)rodata_start, rodata_size, ARCH_MAP_CACHED_RO); + remap_range((void *)rodata_start, rodata_size, MAP_RO); setup_trap_pages(); } diff --git a/arch/arm/cpu/mmu-common.h b/arch/arm/cpu/mmu-common.h index a111e15a21b4..39332d8f5a98 100644 --- a/arch/arm/cpu/mmu-common.h +++ b/arch/arm/cpu/mmu-common.h @@ -12,7 +12,6 @@ #include <linux/bits.h> #define ARCH_MAP_CACHED_RWX MAP_ARCH(2) -#define ARCH_MAP_CACHED_RO MAP_ARCH(3) #define ARCH_MAP_FLAG_PAGEWISE BIT(31) @@ -32,7 +31,7 @@ static inline maptype_t arm_mmu_maybe_skip_permissions(maptype_t map_type) switch (map_type & MAP_TYPE_MASK) { case MAP_CODE: case MAP_CACHED: - case ARCH_MAP_CACHED_RO: + case MAP_RO: return ARCH_MAP_CACHED_RWX; default: return map_type; diff --git a/arch/arm/cpu/mmu_32.c b/arch/arm/cpu/mmu_32.c index 912d14e8cf82..d41ebcfb7fe4 100644 --- a/arch/arm/cpu/mmu_32.c +++ b/arch/arm/cpu/mmu_32.c @@ -304,7 +304,7 @@ static uint32_t get_pte_flags(maptype_t map_type) switch (map_type & MAP_TYPE_MASK) { case ARCH_MAP_CACHED_RWX: return PTE_FLAGS_CACHED_V7_RWX; - case ARCH_MAP_CACHED_RO: + case MAP_RO: return PTE_FLAGS_CACHED_RO_V7; case MAP_CACHED: return PTE_FLAGS_CACHED_V7; @@ -320,7 +320,7 @@ static uint32_t get_pte_flags(maptype_t map_type) } } else { switch (map_type & MAP_TYPE_MASK) { - case ARCH_MAP_CACHED_RO: + case MAP_RO: case MAP_CODE: return PTE_FLAGS_CACHED_RO_V4; case ARCH_MAP_CACHED_RWX: diff --git a/arch/arm/cpu/mmu_64.c b/arch/arm/cpu/mmu_64.c index 56c6a21f2b2a..006b2b29478f 100644 --- a/arch/arm/cpu/mmu_64.c +++ b/arch/arm/cpu/mmu_64.c @@ -159,7 +159,7 @@ static unsigned long get_pte_attrs(maptype_t map_type) return attrs_xn() | MEM_ALLOC_WRITECOMBINE; case MAP_CODE: return CACHED_MEM | PTE_BLOCK_RO; - case ARCH_MAP_CACHED_RO: + case MAP_RO: return attrs_xn() | CACHED_MEM | PTE_BLOCK_RO; case ARCH_MAP_CACHED_RWX: return CACHED_MEM; diff --git a/include/mmu.h b/include/mmu.h index f79619808829..7d87885a5cb4 100644 --- a/include/mmu.h +++ b/include/mmu.h @@ -16,6 +16,12 @@ #define MAP_WRITECOMBINE MAP_UNCACHED #endif +#ifdef CONFIG_ARCH_HAS_RO_MAPPINGS +#define MAP_RO 5 +#else +#define MAP_RO MAP_CACHED +#endif + #define MAP_TYPE_MASK 0xFFFF #define MAP_ARCH(x) ((u16)~(x)) -- 2.47.3
