Until now we linked the raw barebox proper binary into the PBL which comes with a number of disadvantages. We rely on self-modifying code to in barebox proper (relocate_to_current_adr()) and have no initialized bss segment (setup_c()). Also we can only mark the .text and .rodata as readonly during runtime of barebox proper.
This series overcomes this by linking a ELF image into the PBL. This image is properly layed out, linked and initialized in the PBL. With this barebox proper has a proper C environment and text/rodata protection from the start. As a bonus this series also adds initial MMU support for RISCV, also based on loading the ELF image and configuring the MMU from the PBL. This series also marks my start into AI assisted programming as you can see in the Co-Authored-By: Claude Sonnet 4.5 <[email protected]> and 🤖 Generated with [Claude Code](https://claude.com/claude-code) tags. Without it I wouldn't have started this series during my xmas break, but with it it was actually quite fun to do; it felt like having a programming team which I just had to delegate new tasks to while having fun with my family myself ;) Co-Authored-By: Claude Sonnet 4.5 <[email protected]> Signed-off-by: Sascha Hauer <[email protected]> --- Sascha Hauer (19): elf: Use memcmp to make suitable for PBL elf: build for PBL as well elf: add dynamic relocation support ARM: implement elf_apply_relocations() for ELF relocation support riscv: implement elf_apply_relocations() for ELF relocation support elf: implement elf_load_inplace() elf: create elf_open_binary_into() Makefile: add barebox.elf build target PBL: allow to link ELF image into PBL mmu: add MAP_CACHED_RO mapping type mmu: introduce pbl_remap_range() ARM: use relative jumps in exception table ARM: exceptions: make in-binary exception table const ARM: linker script: create separate PT_LOAD segments for text, rodata, and data ARM: link ELF image into PBL ARM: PBL: setup MMU with proper permissions from ELF segments riscv: link ELF image into PBL riscv: linker script: create separate PT_LOAD segments for text, rodata, and data riscv: add ELF segment-based memory protection with MMU Makefile | 16 +- arch/arm/Kconfig | 2 + arch/arm/cpu/exceptions_32.S | 54 +++--- arch/arm/cpu/interrupts_32.c | 41 +++- arch/arm/cpu/mmu-common.c | 66 +------ arch/arm/cpu/mmu-common.h | 3 +- arch/arm/cpu/mmu_32.c | 19 +- arch/arm/cpu/mmu_64.c | 10 +- arch/arm/cpu/no-mmu.c | 11 +- arch/arm/cpu/start.c | 4 - arch/arm/cpu/uncompress.c | 46 ++++- arch/arm/include/asm/barebox-arm.h | 4 +- arch/arm/include/asm/barebox.lds.h | 14 +- arch/arm/include/asm/elf.h | 11 ++ arch/arm/include/asm/sections.h | 1 + arch/arm/lib/pbl.lds.S | 8 +- arch/arm/lib32/Makefile | 1 + arch/arm/lib32/barebox.lds.S | 39 ++-- arch/arm/lib32/elf_reloc.c | 105 ++++++++++ arch/arm/lib64/Makefile | 1 + arch/arm/lib64/barebox.lds.S | 31 ++- arch/arm/lib64/elf_reloc.c | 105 ++++++++++ arch/riscv/Kconfig | 18 ++ arch/riscv/Kconfig.socs | 1 - arch/riscv/boot/start.c | 4 - arch/riscv/boot/uncompress.c | 41 +++- arch/riscv/cpu/Makefile | 1 + arch/riscv/cpu/mmu.c | 386 +++++++++++++++++++++++++++++++++++++ arch/riscv/cpu/mmu.h | 144 ++++++++++++++ arch/riscv/include/asm/asm.h | 3 +- arch/riscv/include/asm/mmu.h | 44 +++++ arch/riscv/lib/Makefile | 1 + arch/riscv/lib/barebox.lds.S | 38 ++-- arch/riscv/lib/elf_reloc.c | 212 ++++++++++++++++++++ common/Makefile | 2 +- common/elf.c | 367 +++++++++++++++++++++++++++++++++-- images/Makefile | 18 +- images/piggy.S | 4 + include/elf.h | 62 ++++++ include/mmu.h | 12 +- include/pbl/mmu.h | 29 +++ lib/Makefile | 1 + lib/elf_reloc.c | 15 ++ pbl/Kconfig | 8 + pbl/Makefile | 1 + pbl/mmu.c | 111 +++++++++++ scripts/prelink-riscv.inc | 9 +- 47 files changed, 1922 insertions(+), 202 deletions(-) --- base-commit: e2d7e032281158b54541392b4d8108de204137a1 change-id: 20251227-pbl-load-elf-cb4cb0ceb7d8 Best regards, -- Sascha Hauer <[email protected]>
