The invalidate was removed from __barebox_arm_entry, so it precedes MMU setup. This was missed for ARM64 and it happened even when the MMU was already enabled.
Additionally, the invalidate was done even if MMU was already enabled. We have this check for barebox as EFI payload, where we shouldn't really do any cache maintenance ourselves, so move it after the check. Signed-off-by: Ahmad Fatoum <[email protected]> --- arch/arm/cpu/mmu_32.c | 4 ++-- arch/arm/cpu/mmu_64.c | 2 ++ 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/mmu_32.c b/arch/arm/cpu/mmu_32.c index 7b49643fd79b..6821088c4340 100644 --- a/arch/arm/cpu/mmu_32.c +++ b/arch/arm/cpu/mmu_32.c @@ -613,11 +613,11 @@ void mmu_early_enable(unsigned long membase, unsigned long memsize) pr_debug("enabling MMU, ttb @ 0x%p\n", ttb); - cache_invalidate_stale(); - if (get_cr() & CR_M) return; + cache_invalidate_stale(); + set_ttbr(ttb); set_domain(DOMAIN_CLIENT); diff --git a/arch/arm/cpu/mmu_64.c b/arch/arm/cpu/mmu_64.c index bf44cc7bccf2..a49beac350d3 100644 --- a/arch/arm/cpu/mmu_64.c +++ b/arch/arm/cpu/mmu_64.c @@ -392,6 +392,8 @@ void mmu_early_enable(unsigned long membase, unsigned long memsize) if (get_cr() & CR_M) return; + cache_invalidate_stale(); + pr_debug("enabling MMU, ttb @ 0x%08lx\n", ttb); el = current_el(); -- 2.47.3
