On 12/18/2014 3:39 PM, Charles Kerr wrote:
> Was curious how many PRU pins (on each PRU) would be available for direct 
> mapping to R30/R31 of the PRU?  One of the drawbacks I have with the BBB is 
> the limited direct access pins for output on both PRUs (after you use the 
> FLASH and a few peripherals).

I've got a pinout spreadsheet color-coded with PRU I/O (and GPIO bank
numbers and other useful info) in github:

https://github.com/cdsteinkuehler/beaglebone-black-pinmux/blob/hal_pru_generic/pinmux.ods

If you're wanting to do output, you can use standard GPIO pins (accessed
via the internal SoC L4_PERport1 bus) for all but the most timing
sensitive applications.  The writes get posted so they don't stall the
PRU unless you do a bunch of them back-to-back, and the total latency is
only around 100 ns.  I've got timing details from tests I ran in some
code comments:

https://github.com/machinekit/machinekit/blob/master/src/hal/drivers/hal_pru_generic/pru_generic.p#L135-L163

For inputs, you really *DO* want to use the direct PRU pins, as it takes
about 165 nS to read from a GPIO register via the SoC fabric, vs one 5
nS PRU clock for the direct inputs.

-- 
Charles Steinkuehler
char...@steinkuehler.net

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