I have it working (to some degree) on 4.4.7-bone-rt-r9. I had to change the 
boot DTB to not include the edma fix, and to set the mcasp clk (it doesn't work 
if you set it in the overlay, not sure why. There's a thread about it 
somewhere).


> On Apr 20, 2016, at 10:57 , evilwulfie <evilwul...@gmail.com> wrote:
> 
> Beware of electronics engineers programming  <---  LOL
> 
> I read on the lists about  not being able to load the audio cape dtbo on
> 4.1.14-bone-rt-r17
> I disabled the onboard HDMI in Uboot
> I tried with failure just to see if the audio cape will load
> 
> Apr 20 16:59:56 beaglebone kernel: [  149.758497] bone_capemgr
> bone_capemgr: part_number 'BB-BONE-AUDI-02', version 'N/A'
> Apr 20 16:59:56 beaglebone kernel: [  149.766308] bone_capemgr
> bone_capemgr: slot #4: override
> Apr 20 16:59:56 beaglebone kernel: [  149.771655] bone_capemgr
> bone_capemgr: Using override eeprom data at slot 4
> Apr 20 16:59:56 beaglebone kernel: [  149.778697] bone_capemgr
> bone_capemgr: slot #4: 'Override Board Name,00A0,Override
> Manuf,BB-BONE-AUDI-02'
> 
> 
> nothing shows as loaded
> 
> debian@beaglebone:~$ cat /sys/devices/platform/bone_capemgr/slots
> 0: PF----  -1
> 1: PF----  -1
> 2: PF----  -1
> 3: PF----  -1
> 
> 
> 
> I have a project that will eventually use the mcasp0 and am trying to
> write an overlay to set all pins
> so i figured i would try to set the mcasp0 pins and it fails
> 
> I also have a tough time just setting random GPIO pins which i cant
> quite figure out
> 
> so far i can get the UART1, UART4, UART5 and I2C1 loaded correctly from
> one file
> 
> now its just GPIO pins and the mcasp0
> 
> this is the snippit of the gpio stuff that dont work, rest of file below
> removed for clarity
> 
> 
>                      mygpio0_pins_default: mygpio0_pins_default {
>                              pinctrl-single,pins = <
>                                      0x150 ( PIN_INPUT | MUX_MODE7 ) /*
> (A17) spi0_sclk.gpio0[2] */
>                                      0x154 ( PIN_INPUT | MUX_MODE7 ) /*
> (B17) spi0_d0.gpio0[3] */
>                                      0x164 ( PIN_INPUT | MUX_MODE7 ) /*
> (C18) eCAP0_in_PWM0_out.gpio0[7] */
>                                      0x20 ( PIN_INPUT | MUX_MODE7 ) /*
> (U10) gpmc_ad8.gpio0[22] */
>                                      0x24 ( PIN_INPUT | MUX_MODE7 ) /*
> (T10) gpmc_ad9.gpio0[23] */
>                                      0x28 ( PIN_INPUT | MUX_MODE7 ) /*
> (T11) gpmc_ad10.gpio0[26] */
>                                      0x2c ( PIN_INPUT | MUX_MODE7 ) /*
> (U12) gpmc_ad11.gpio0[27] */
>> ;
>                      };
> 
>      fragment@5 {
>              target = <&mygpio0>;
>              __overlay__ {
>                      status = "okay";
>                      pinctrl-names = "default";
>                      pinctrl-0 = <&mygpio0_pins_default>;
>              };
>      };
> 
> even with ALL the GPIO pins commented out the cape does not load even
> though overlay compiles correctly
> you would think that since no pins are being set the uarts and i2ci but
> would be set.
> 
> any help would be appreciated
> 
> 
> 
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-- 
Rick Mann
rm...@latencyzero.com


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