kernel 3.8.x
Thanks for the effort for addressing this problem in advance.
The following assembler and python files concists of my code to measure
frequencies on the respectiver ports P8_15 and P8_16 using PRU0. The only
problem being the outout of one of those frequency measured is always
fluctuatung by a large margin (does show the actual output sometimes). I
agree with the fact that this code can handle frequency measurement at one
ports flawlessly I have checked for overflow of memory assigned at the
shared ram and I can confirm that the flaw in output is not due to the
overflow.
Any help would be appreseated.
Thank you.
The following code is assembler code I have been using-
.origin 0
#define PRU0_ARM_INTERRUPT 19
#define CONST_PRUCFG C4
#define CONST_PRUSHAREDRAM C28
#define PRU0_CTRL 0x22000
#define PRU1_CTRL 0x24000
#define CTPPR0 0x28
#define OWN_RAM 0x000
#define OTHER_RAM 0x020
#define SHARED_RAM 0x100
#define SECOND 200000000 // 2e8 5ns cycles
#define DELAY 200 // 0.01 s
START:
lbco r0, CONST_PRUCFG, 4, 4 // Enable OCP master port
clr r0, r0, 4
sbco r0, CONST_PRUCFG, 4, 4
mov r0, SHARED_RAM // Set C28 to point to shared RAM
mov r1, PRU0_CTRL + CTPPR0
sbbo r0, r1, 0, 4
mov r2.w0, DELAY & 0xFFFF
mov r2.w2, DELAY >> 16
WAITLO:
qbbc WAITLO, r31.t15
IGNORE: // Wait for 50 consecutive readings of
1
add r0, r0, 2 // 3 cycles per loop
qbgt IGNORE, r0, r2
WAIT1: // Continue counting while input is
still 1
add r0, r0, 2
qbbs WAIT1, r31.t15
WAIT2: // Continue counting while input is 0
add r0, r0, 2
qbbc WAIT2, r31.t15 // End count when input goes to 1
sbco r0, CONST_PRUSHAREDRAM, 0, 4 // Write count to RAM
MOV R31.b0, PRU0_ARM_INTERRUPT+16 // Send notification to Host for
program completion
mov r0,0
WAITLO1:
qbbc WAITLO1, r31.t14
IGNORE1: // Wait for 50 consecutive readings
of 1
add r0, r0, 2 // 3 cycles per loop
qbgt IGNORE1, r0, r2
WAIT3: // Continue counting while input is
still 1
add r0, r0, 2
qbbs WAIT3, r31.t14
WAIT4: // Continue counting while input is 0
add r0, r0, 2
qbbc WAIT4, r31.t14 // End count when input goes to 1
sbco r0, CONST_PRUSHAREDRAM,8 , 4 // Write count to RAM
MOV R31.b0, PRU0_ARM_INTERRUPT+16 // Send notification to Host for
program completion
mov r0, 0
jmp IGNORE
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.origin 0
#define PRU0_ARM_INTERRUPT 19
#define CONST_PRUCFG C4
#define CONST_PRUSHAREDRAM C28
#define PRU0_CTRL 0x22000
#define PRU1_CTRL 0x24000
#define CTPPR0 0x28
#define OWN_RAM 0x000
#define OTHER_RAM 0x020
#define SHARED_RAM 0x100
#define SECOND 200000000 // 2e8 5ns cycles
#define DELAY 200 // 0.01 s
START:
lbco r0, CONST_PRUCFG, 4, 4 // Enable OCP master port
clr r0, r0, 4
sbco r0, CONST_PRUCFG, 4, 4
mov r0, SHARED_RAM // Set C28 to point to shared RAM
mov r1, PRU0_CTRL + CTPPR0
sbbo r0, r1, 0, 4
mov r2.w0, DELAY & 0xFFFF
mov r2.w2, DELAY >> 16
WAITLO:
qbbc WAITLO, r31.t15
IGNORE: // Wait for 50 consecutive readings of 1
add r0, r0, 2 // 3 cycles per loop
qbgt IGNORE, r0, r2
WAIT1: // Continue counting while input is still 1
add r0, r0, 2
qbbs WAIT1, r31.t15
WAIT2: // Continue counting while input is 0
add r0, r0, 2
qbbc WAIT2, r31.t15 // End count when input goes to 1
sbco r0, CONST_PRUSHAREDRAM, 0, 4 // Write count to RAM
MOV R31.b0, PRU0_ARM_INTERRUPT+16 // Send notification to Host for program completion
mov r0,0
WAITLO1:
qbbc WAITLO1, r31.t14
IGNORE1: // Wait for 50 consecutive readings of 1
add r0, r0, 2 // 3 cycles per loop
qbgt IGNORE1, r0, r2
WAIT3: // Continue counting while input is still 1
add r0, r0, 2
qbbs WAIT3, r31.t14
WAIT4: // Continue counting while input is 0
add r0, r0, 2
qbbc WAIT4, r31.t14 // End count when input goes to 1
sbco r0, CONST_PRUSHAREDRAM,8 , 4 // Write count to RAM
MOV R31.b0, PRU0_ARM_INTERRUPT+16 // Send notification to Host for program completion
mov r0, 0
jmp IGNORE
# rpm.py - gets rpm value
from __future__ import print_function
import pypruss
import os
import time
import mmap
import struct
from time import sleep
PRU_ICSS = 0x4A300000
START = 0x00010000
START1 =0x00010008
def readrpm():
with open('/dev/mem', 'r+b') as m:
mem = mmap.mmap( m.fileno(), 512*1024, offset=PRU_ICSS)
valuestring = mem[START:START+4]
value = struct.unpack('L', valuestring)[0]
#long seconds
seconds = value # 5ns per cycle
return seconds
def readrpm_2():
with open('/dev/mem', 'r+b') as m:
mem = mmap.mmap( m.fileno(), 512*1024, offset=PRU_ICSS)
valuestring = mem[START1:START1+4]
value = struct.unpack('L', valuestring)[0]
#long seconds2
seconds2 = value # 5ns per cycle
return seconds2
os.system("config-pin p8.15 pruin")
os.system("config-pin p8.16 pruin")
pypruss.modprobe() # This only has to be called once pr boot
pypruss.init() # Init the PRU
pypruss.open(0) # Open PRU event 0 which is PRU0_ARM_INTERRUPT
pypruss.pruintc_init() # Init the interrupt controller
pypruss.exec_program(0, "./FREQ-MSR-ASSEM.bin") # Load firmware "blinkled.bin" on PRU 0
try:
while True:
pypruss.wait_for_event(0) # Wait for event 0 which is connected to PRU0_ARM_INTERRUPT
seconds = readrpm()
time.sleep(.5)
print("!1st channel starts here!")
print("-------------------------------")
print (r'{} cycles'.format(seconds))
print( r'{} seconds-1'.format(seconds*0.000000005) )
frequency= (1/(seconds*0.000000005))
print (r'{} Hz-1'.format(frequency))
print("-------------------------------")
print("!2nd channel starts here!")
print("-------------------------------")
pypruss.wait_for_event(0) # Wait for event 0 which is connected to PRU0_ARM_INTERRUPT
seconds2 = readrpm_2()
print (r'{} cycles'.format(seconds2))
print( r'{} seconds-2'.format(seconds2*0.000000005) )
frequency= (1/(seconds2*0.000000005))
print (r'{} Hz-2'.format(frequency))
print("-------------------------------")
pypruss.clear_event(0)#,pypruss.PRU0_ARM_INTERRUPT) # Clear the event
except KeyboardInterrupt as e:
print(e)
pypruss.pru_disable(0) # Disable PRU 0, this is already done by the firmware
pypruss.exit() # Exit, don't know what this does.
