An update:
1. Enable the i2c peripheral clock:
#define CM_PER_I2C2 (*((volatile unsigned int *)0x44E00044))
/* Enable I2C2 clock signal generation */
while (!(CM_PER_I2C2 & 0x2))
CM_PER_I2C2 |= 0x2;
2. Setup the registers:
/*
* set I2C2_PSC register to 0x0B
* set I2C2_SCCL register to 0x0D
* set I2C2_SCCH register to 0x0F
* set I2C2_CON register to 1000 0110 0000 0000 (0x8600)
* set I2C2_SA register to 0x2E (address of MCP4641)
* set I2C2_CNT register to 2 (data length)
*/
I2C2_PSC = 0x000B;
I2C2_SCLL = 0x000D;
I2C2_SCLH = 0x000F;
I2C2_CON = 0x8600;
I2C2_SA = i2cPotAddress;
I2C2_CNT = 2;
3. You can now program the device:
/*
* poll 'busy bit' in I2C2_STATUSRAW register (bit 12) until it is zero
* set start/stop bits in I2C2_CON register to initiate a transfer
* poll XRDY bit in I2C2_STATUSRAW register (bit 4) until it is non-zero
* load 1st byte of data into I2C2_DATA register
* poll XRDY bit in I2C2_STATUSRAW register (bit 4) until it is non-zero
* load 2nd byte of data into I2C2_DATA register
*/
while (I2C2_STATUSRAW & 0x1000);
//poll 'busy bit' in I2C2_STATUSRAW register (bit 12) until it is zero
I2C2_CON = 0x8603;
while (!I2C2_STATUSRAW & 0x0010);
//poll XRDY bit in I2C2_STATUSRAW register (bit 4) until it is non-zero
I2C2_DATA = torqueWiper;
while (!I2C2_STATUSRAW & 0x0010);
//poll XRDY bit in I2C2_STATUSRAW register (bit 4) until it is non-zero
I2C2_DATA = 0x55;
4. The kernel mode (and bonescript) i2c drivers will put the device to
sleep and disable the clock after every transfer, so to access it from the
PRU you need to setup the registers each time you want to access a device
on the bus.
Hope that helps someone...
On Tuesday, 14 August 2018 12:29:12 UTC+1, Hugh Frater wrote:
>
> Does anyone know the header file I need to include to get access to the
> i2c2 control registers from within the PRU subsystem? Having a hard time
> getting any info and my google-foo is usually pretty decent...
>
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