There're 17 input lines in each R31 (bit [0:16]). It'd be best if you use a set of eight (bit [0:7] or bit [8:15]), because the data to write would be only one byte.
Anyhow, the following ASM code is for word data (bit [0:15] range), written to DRam: #define CLKB 5 // define the clock bit# for polling ... LDI r0, 0 // counter init HIGH: QBBC r31, HIGH, CLKB // wait for clk bit getting high SBBO r31, r0, 0, 2 // safe data ADD r0, r0, 2 // increment counter QB?? ??, OUT // termination LOW: QBBS r31, LOW, CLKB // wait for clk bit getting low SBBO r31, r0, 0, 2 // safe data ADD r0, r0, 2 // increment counter QB?? ??, HIGH // reverse termination OUT: // Note: // In order to get higher frequency the SBBO + ADD instructions can // get replaced by MVIW for buffering the data in the register file, // but this is limited to 30*2=60 sets of data. The main loop contains two similar sub loops, one starting after the clk line gets high, the other starting after the clk line gets low. If the state of the clk line starts undefined, you've to add an initial QBB? before the main loop, in order to start at the right sub-loop. AFAI understand your signal diagram, you're dealing with redundant data. Only three lines provide information. Find example code in the libpruio documentation. Example pruss_toggle <http://users.freebasic-portal.de/tjf/Projekte/libpruio/doc/html/ChaExamples.html#sSecExaPruToggle> defines an output line and loads firmware to toggle that line. You can adapt that code for your input lines. -- For more options, visit http://beagleboard.org/discuss --- You received this message because you are subscribed to the Google Groups "BeagleBoard" group. To unsubscribe from this group and stop receiving emails from it, send an email to beagleboard+unsubscr...@googlegroups.com. To view this discussion on the web visit https://groups.google.com/d/msgid/beagleboard/caa54b14-4bf4-4731-a2a5-33bd6392e5f0%40googlegroups.com.
