Hello Jason,

Thank you for update. 
Could you inform how to use provided dts files  on  
https://elinux.org/Beagleboard:BeagleBone_cape_interface_spec 
<https://www.google.com/url?q=https%3A%2F%2Felinux.org%2FBeagleboard%3ABeagleBone_cape_interface_spec&sa=D&sntz=1&usg=AFQjCNGe8fl029Q4RPSq5VUXryDjbak-nw>
 ? 
Are their *.dtb files already compiled/copied on /boot/dtbs ?

I used to compile dts file to dtb file and copied it to /boot/dtbs/. 
 
Thank you so much!

On Thursday, April 23, 2020 at 10:12:01 AM UTC-6, Jason Kridner wrote:
>
> Thanks for all your shared work. 
>
> The plan for the Fall release (based on GSoC work on-going this summer, if 
> approved, or this might be delayed) is to modify the base device trees and 
> set of overlays to provide at common set of overlays to load for Black/AI. 
> Then, symlinks would be provided that map to UARTs on specific header pins.
>
> See https://elinux.org/Beagleboard:BeagleBone_cape_interface_spec 
> <https://www.google.com/url?q=https%3A%2F%2Felinux.org%2FBeagleboard%3ABeagleBone_cape_interface_spec&sa=D&sntz=1&usg=AFQjCNGe8fl029Q4RPSq5VUXryDjbak-nw>
>  for 
> work-in-progress.
>
> On Wed, Apr 22, 2020 at 10:22 PM <ahni...@gmail.com <javascript:>> wrote:
>
>>
>> I hope it is helpful for uart3  /dev/ttyS2 device tree implementation. 
>>
>> Uart3 RX starts working after the mode update to 
>>
>> PIN_INPUT_PULLUP | MUX_MODE1 // P9.22b uart3_rxd
>>
>> Mode is confirmed as the following:
>>
>>
>> P9.22b   240 fast rx  up   1 uart 2 rxd       serial@48020000 (uart3)
>>
>> pin 240 (PIN240) 4a0037c0 00060001 pinctrl-single ( instead of 00000001)
>>
>>
>>
>> UART3 TX was working without any pull up or pull down.
>>
>> P9_21, MUX_MODE1 ) // P9.21 uart3_txd
>>
>> pin 241 (PIN241) 4a0037c4 00000001 pinctrl-single
>>
>>
>>
>> To activate uart3, please add the following code into *.dts file and 
>> compile to *.dtb. 
>>
>> Also please modify the am572*ai.dts file by deactivating the shared pins.
>>
>>
>> &uart3 {
>>
>>  status = "okay";
>>
>>  pinctrl-names = "default";
>>
>>  pinctrl-0 = <&uart3_pins>;
>>
>> };
>>
>> &dra7_pmx_core {
>>
>>  uart3_pins: uart3 {
>>
>>   pinctrl-single,pins = <
>>
>>    DRA7XX_CORE_IOPAD( P9_21, MUX_MODE1 ) // P9.21 uart3_txd
>>
>>    DRA7XX_CORE_IOPAD( P9_22b, PIN_INPUT_PULLUP | MUX_MODE1) // P9.22b 
>> uart3_rxd
>>
>>    DRA7XX_CORE_IOPAD( P9_22a, MUX_MODE15) // P9.22a driver_off 
>> //shared-pin
>>
>>   >;
>>
>>  };
>>
>>  
>>
>> };
>>
>>
>> -- 
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>>
>
>
> -- 
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