This patch looks good to me. Homer
-----Original Message----- From: beignet-bounces+homer.xing=intel....@lists.freedesktop.org [mailto:beignet-bounces+homer.xing=intel....@lists.freedesktop.org] On Behalf Of Yang Rong Sent: Monday, October 21, 2013 7:13 PM To: beignet@lists.freedesktop.org Cc: Yang, Rong R Subject: [Beignet] [PATCH 2/2] Disable instrucion schedule temp. If enable schedule, will cause fails. Will enable it after fix these fails. Signed-off-by: Yang Rong <rong.r.y...@intel.com> --- backend/src/backend/gen_insn_scheduling.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/backend/src/backend/gen_insn_scheduling.cpp b/backend/src/backend/gen_insn_scheduling.cpp index f1f5775..a711f45 100644 --- a/backend/src/backend/gen_insn_scheduling.cpp +++ b/backend/src/backend/gen_insn_scheduling.cpp @@ -602,8 +602,8 @@ namespace gbe } } - BVAR(OCL_POST_ALLOC_INSN_SCHEDULE, true); - BVAR(OCL_PRE_ALLOC_INSN_SCHEDULE, true); + BVAR(OCL_POST_ALLOC_INSN_SCHEDULE, false); + BVAR(OCL_PRE_ALLOC_INSN_SCHEDULE, false); void schedulePostRegAllocation(GenContext &ctx, Selection &selection) { if (OCL_POST_ALLOC_INSN_SCHEDULE) { -- 1.8.1.2 _______________________________________________ Beignet mailing list Beignet@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/beignet _______________________________________________ Beignet mailing list Beignet@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/beignet
