We need to consider the situation that the 64 bit virtual register
is crossing two GRFs.
Signed-off-by: Zhigang Gong <zhigang.g...@intel.com>
---
backend/src/backend/gen_register.hpp | 2 ++
1 file changed, 2 insertions(+)
diff --git a/backend/src/backend/gen_register.hpp
b/backend/src/backend/gen_register.hpp
index 73d8ffa..57c78d9 100644
--- a/backend/src/backend/gen_register.hpp
+++ b/backend/src/backend/gen_register.hpp
@@ -270,6 +270,8 @@ namespace gbe
INLINE GenRegister top_half(void) const {
GenRegister r = bottom_half();
r.subnr += 4;
+ r.nr += r.subnr / 32;
+ r.subnr %= 32;
return r;
}
--
1.7.9.5
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