The front end label is still 16 bit. But the auxiliary label could be larger than that. This is the preparation to support 32 bit label for both front end and backend.
Signed-off-by: Zhigang Gong <zhigang.g...@intel.com> --- backend/src/backend/gen_insn_selection.cpp | 24 ++++++++++++------------ backend/src/backend/gen_insn_selection.hpp | 4 ++-- backend/src/ir/instruction.hpp | 2 +- 3 files changed, 15 insertions(+), 15 deletions(-) diff --git a/backend/src/backend/gen_insn_selection.cpp b/backend/src/backend/gen_insn_selection.cpp index 5586468..490525f 100644 --- a/backend/src/backend/gen_insn_selection.cpp +++ b/backend/src/backend/gen_insn_selection.cpp @@ -639,7 +639,7 @@ namespace gbe friend class SelectionInstruction; private: /*! Auxiliary label for if/endif. */ - uint16_t currAuxLabel; + uint32_t currAuxLabel; bool bHas32X32Mul; INLINE ir::LabelIndex newAuxLabel() { @@ -1020,7 +1020,7 @@ namespace gbe void Selection::Opaque::LABEL(ir::LabelIndex index) { SelectionInstruction *insn = this->appendInsn(SEL_OP_LABEL, 0, 0); - insn->index = uint16_t(index); + insn->index = uint32_t(index); } void Selection::Opaque::BARRIER(GenRegister src, GenRegister fence, uint32_t barrierType) { @@ -1038,7 +1038,7 @@ namespace gbe int Selection::Opaque::JMPI(Reg src, ir::LabelIndex index, ir::LabelIndex origin) { SelectionInstruction *insn = this->appendInsn(SEL_OP_JMPI, 0, 1); insn->src(0) = src; - insn->index = uint16_t(index); + insn->index = uint32_t(index); insn->extra.longjmp = abs(index - origin) > 800; return insn->extra.longjmp ? 2 : 1; } @@ -1046,28 +1046,28 @@ namespace gbe void Selection::Opaque::BRD(Reg src, ir::LabelIndex jip) { SelectionInstruction *insn = this->appendInsn(SEL_OP_BRD, 0, 1); insn->src(0) = src; - insn->index = uint16_t(jip); + insn->index = uint32_t(jip); } void Selection::Opaque::BRC(Reg src, ir::LabelIndex jip, ir::LabelIndex uip) { SelectionInstruction *insn = this->appendInsn(SEL_OP_BRC, 0, 1); insn->src(0) = src; - insn->index = uint16_t(jip); - insn->index1 = uint16_t(uip); + insn->index = uint32_t(jip); + insn->index1 = uint32_t(uip); } void Selection::Opaque::IF(Reg src, ir::LabelIndex jip, ir::LabelIndex uip) { SelectionInstruction *insn = this->appendInsn(SEL_OP_IF, 0, 1); insn->src(0) = src; - insn->index = uint16_t(jip); - insn->index1 = uint16_t(uip); + insn->index = uint32_t(jip); + insn->index1 = uint32_t(uip); } void Selection::Opaque::ELSE(Reg src, ir::LabelIndex jip, ir::LabelIndex elseLabel) { SelectionInstruction *insn = this->appendInsn(SEL_OP_ELSE, 0, 1); insn->src(0) = src; - insn->index = uint16_t(jip); + insn->index = uint32_t(jip); this->LABEL(elseLabel); } @@ -1079,13 +1079,13 @@ namespace gbe this->LABEL(this->block->endifLabel); SelectionInstruction *insn = this->appendInsn(SEL_OP_ENDIF, 0, 1); insn->src(0) = src; - insn->index = uint16_t(this->block->endifLabel); + insn->index = uint32_t(this->block->endifLabel); } void Selection::Opaque::WHILE(Reg src, ir::LabelIndex jip) { SelectionInstruction *insn = this->appendInsn(SEL_OP_WHILE, 0, 1); insn->src(0) = src; - insn->index = uint16_t(jip); + insn->index = uint32_t(jip); } void Selection::Opaque::CMP(uint32_t conditional, Reg src0, Reg src1, Reg dst) { @@ -1687,7 +1687,7 @@ namespace gbe if (this->ctx.getIFENDIFFix() && this->block->insnList.size() != 0 && this->block->insnList.size() % 1000 == 0 && - (uint16_t)this->block->endifLabel != 0) { + (uint32_t)this->block->endifLabel != 0) { ir::LabelIndex jip = this->block->endifLabel; this->ENDIF(GenRegister::immd(0), jip); this->push(); diff --git a/backend/src/backend/gen_insn_selection.hpp b/backend/src/backend/gen_insn_selection.hpp index 8bffb16..c2c4dae 100644 --- a/backend/src/backend/gen_insn_selection.hpp +++ b/backend/src/backend/gen_insn_selection.hpp @@ -140,9 +140,9 @@ namespace gbe /*! Number of sources */ uint8_t srcNum:4; /*! To store various indices */ - uint16_t index; + uint32_t index; /*! For BRC/IF to store the UIP */ - uint16_t index1; + uint32_t index1; /*! instruction ID used for vector allocation. */ uint32_t ID; /*! Variable sized. Destinations and sources go here */ diff --git a/backend/src/ir/instruction.hpp b/backend/src/ir/instruction.hpp index 37f64af..09b0148 100644 --- a/backend/src/ir/instruction.hpp +++ b/backend/src/ir/instruction.hpp @@ -88,7 +88,7 @@ namespace ir { std::ostream &operator<< (std::ostream &out, AddressSpace addrSpace); /*! A label is identified with an unsigned short */ - TYPE_SAFE(LabelIndex, uint16_t) + TYPE_SAFE(LabelIndex, uint32_t) /*! Function class contains the register file and the register tuple. Any * information related to the registers may therefore require a function -- 1.9.1 _______________________________________________ Beignet mailing list Beignet@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/beignet