At 04:05 PM 9/17/2006, Mark Hahn wrote:
<snip>
wherein Jim describes a system which scaled poorly even at n=2.
Yes, the software structure was badly designed for the interconnect.
HOWEVER, the whole point of computing resources is that I really
shouldn't have to design the whole software system around the
peculiarities of the hardware platform.
I would say you want a computational appliance - a concept which is
somewhat at odds to actual programming.
You may be right. The system I described is vintage mid-late 80s
(when hot rod numeric computing was adding a coprocessor to the
286). However, the comment was more directed towards the observation
of one poster that interconnect speed is unimportant to most
developers.. I suspect this isn't the case, and neither is compiler
technology at a point (some 20 years later!) that it can be done
automatically.
The early hypercubes from Intel were essentially an early poke at the
Beowulf concept. Lots of computation with basically stock compute
nodes and basically stock interconnects (albeit on Intel Multibus or
something similar.. I don't recall, and I'm not motivated enough to
go out to the garage to find the docs)
In any case, I think we're a ways away from "automatic utilization of
parallelizable resources", at least for general applications. For
some applications, the return on investment of figuring out how to do
it is sufficiently great that it's worth doing, but those are, I
think, more in the nature of "point designs", rather than generalized
solutions. Perhaps the existence of paralleled libraries for things
like BLAS are a step in that direction.
For myself.. I'd love to be able to spend my time figuring out how
to automatically utilize a given interconnect method (given the
interconnect properties) It's a fascinating optimization problem;
gosh, just figuring out how to describe the interconnect properties
in an abstract way is an interesting problem. Sadly, there are other
claims on my time, and they're the ones that pay me to eat.
James Lux, P.E.
Spacecraft Radio Frequency Subsystems Group
Flight Communications Systems Section
Jet Propulsion Laboratory, Mail Stop 161-213
4800 Oak Grove Drive
Pasadena CA 91109
tel: (818)354-2075
fax: (818)393-6875
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