On Mon, Oct 21, 2013 at 7:16 PM, Ben Kloosterman <[email protected]> wrote:
> On Tue, Oct 22, 2013 at 12:01 AM, Jonathan S. Shapiro <[email protected]>wrote: > >> You need to look at the state of the ARM parts again. Essentially *all* of >> the Cortex-A ARM cores now shipping are multicore. A rapidly increasing >> percentage of the Cortex-M processors are also multicore. Some of the more >> interesting Cortex-M's are asymmetric multicore (e.g. the NXP LPC43xx >> parts). >> > > I didnt mean multi cores , i specifically meant multiple physical CPUs , > raising the LOCK on memory is not pretty. > All mainstream multicores these days are multiple CPUs with fully independent resources implemented on a single piece of silicon, typically sharing either an L2 or an L3 cache. The fact that computational resources aren't shared is what makes this different from "hyperthreading". Raising the lock on L3 cache is plenty bad already. The latest Exynos 5420 Octa ARM SoCs (now shipping) have *eight* cores on a single chip. Four of those are high-performance A15 cores. The other four are Cortex A7 cores. Compatible instruction sets and different power/speed. Now that the software fix is out for the cache coherency subsystem, you really can run all 8 cores at once. That's on an SoC that you'll see shipping in tablets and cell phones in 1Q2014. And yes, you can then build clusters of multicores, but those are truly rare and truly a pain in the neck to think about. The lessons to take away here are: 1. Multicore is here to stay, and for our purposes it is ubiquitous. 2. Interprocessor relationships on real machines have a hierarchical latency structure, and that simplistic models of concurrent scheduling and processing are just that: simplistic. If I managed to write that in a way that seemed critical personally, that wasn't my intention at all. shap
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