tree 3ba4a5f488457ce6432d956b2363e3a3806396f6
parent 1b440c568e28186956ef765c69ab124401088663
author John W. Linville <[EMAIL PROTECTED]> Fri, 22 Apr 2005 07:03:52 -0700
committer David S. Miller <[EMAIL PROTECTED]> Fri, 22 Apr 2005 07:03:52 -0700
[TG3]: add support for bcm5752 rev a1
Replace existing ASIC_REV_5752 definition with ASIC_REV_5752_A0,
and add definition for ASIC_REV_5752_A1. Then, add ASIC_REV_5752_A1
to check for setting TG3_FLG2_5750_PLUS in tg3_get_invariants.
Signed-off-by: John W. Linville <[EMAIL PROTECTED]>
Signed-off-by: David S. Miller <[EMAIL PROTECTED]>
net/tg3.c | 3 ++-
net/tg3.h | 5 ++++-
2 files changed, 6 insertions(+), 2 deletions(-)
Index: drivers/net/tg3.c
===================================================================
--- f7d34015aaccfe11e667c36c8055ebe28cf93301/drivers/net/tg3.c (mode:100644
sha1:0951a9605577ec0d069a1630106ea84a49e80d4a)
+++ 3ba4a5f488457ce6432d956b2363e3a3806396f6/drivers/net/tg3.c (mode:100644
sha1:c1881976927d1d1cb6ade922aca02a68bc723ac2)
@@ -7929,7 +7929,8 @@ static int __devinit tg3_get_invariants(
tp->pci_bist = (cacheline_sz_reg >> 24) & 0xff;
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750 ||
- GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752)
+ GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752_A0 ||
+ GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752_A1)
tp->tg3_flags2 |= TG3_FLG2_5750_PLUS;
if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705) ||
Index: drivers/net/tg3.h
===================================================================
--- f7d34015aaccfe11e667c36c8055ebe28cf93301/drivers/net/tg3.h (mode:100644
sha1:0cce4044530be9c68a22c670c9becb12a3caf51c)
+++ 3ba4a5f488457ce6432d956b2363e3a3806396f6/drivers/net/tg3.h (mode:100644
sha1:3a91a57a3205ceeb6a32600ea29d7c73b5be6399)
@@ -125,6 +125,8 @@
#define CHIPREV_ID_5750_A0 0x4000
#define CHIPREV_ID_5750_A1 0x4001
#define CHIPREV_ID_5750_A3 0x4003
+#define CHIPREV_ID_5752_A0 0x5000
+#define CHIPREV_ID_5752_A1 0x6001
#define GET_ASIC_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 12)
#define ASIC_REV_5700 0x07
#define ASIC_REV_5701 0x00
@@ -132,7 +134,8 @@
#define ASIC_REV_5704 0x02
#define ASIC_REV_5705 0x03
#define ASIC_REV_5750 0x04
-#define ASIC_REV_5752 0x05
+#define ASIC_REV_5752_A0 0x05
+#define ASIC_REV_5752_A1 0x06
#define GET_CHIP_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 8)
#define CHIPREV_5700_AX 0x70
#define CHIPREV_5700_BX 0x71
-
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