------- Additional Comments From nickc at redhat dot com 2009-11-11 09:54 ------- Hi Chris,
> I would just suggest making the warning a comment so that > the output of objdump still can be run through gas. Good point - I will make that change. > On another note, do you have any links explaining the hows and whys > of UNPREDICTABLEs? Well basically it is what ARM have stated in their Architecture Reference Manual. In this particular case for example we had a mode 3 address with the P bit clear (indicating post- addressing) and also the W bit clear (indicating no writeback), which does not make any sense. Why compute an address after the memory access and then ignore it ? What it really means is that ARM hardware implementers are free to do whatever they like in UNPREDICTABLE situations. So for example in this case the hardware could assume that post- addressing always implies writeback and ignore the W bit. Or it could check the W bit and not update the address register. Both implementations would conform to the ARM specification but obviously would confound any assembly code writers or compiler implementers. > How did you know "it is the behaviour of the instruction that > cannot be specified rather than the entire instruction being undefined" ? What I meant was that the instruction itself is still defined. (So for example in the test case you supplied the instruction is still a store-half-word). But the exact behaviour of the side-effects of the instruction is undefined. (So again in the example the r0 register may or may not be updated with the post computed address). I have checked the patch in, but I will leave this issue open for reports of other UNPREDICTABLE bit patterns. Cheers Nick -- http://sourceware.org/bugzilla/show_bug.cgi?id=10924 ------- You are receiving this mail because: ------- You are on the CC list for the bug, or are watching someone who is. _______________________________________________ bug-binutils mailing list bug-binutils@gnu.org http://lists.gnu.org/mailman/listinfo/bug-binutils