http://sourceware.org/bugzilla/show_bug.cgi?id=12608
Michael Cree <mcree at orcon dot net.nz> changed: What |Removed |Added ---------------------------------------------------------------------------- CC| |mcree at orcon dot net.nz --- Comment #8 from Michael Cree <mcree at orcon dot net.nz> 2011-03-31 23:08:24 UTC --- I see the bug compiling just as Aurelien describes. This is using Debian unstable binutils (2.21.0.20110327). The bug does not appear if one compiles with the "-Wl,--no-relax" option. I think the bug is likely to be in the elf64_alpha_relax_tls_get_addr() function of bfd/elf64-alpha.c which is the function that implements the transformation of code of the specific example. The particular register that is loaded into the x of the instruction "ldq x,-32680(gp)" in the examples given by Aurelien is at line 3500 of the bfd/elf64-alpha.c code and is: tlsgd_reg = bfd_get_32 (info->abfd, pos[0]); tlsgd_reg = (tlsgd_reg >> 21) & 31; For some reason it can pick up the wrong register, i.e., it seems to be getting the register of the first instruction in the sequence transformation always, and if the first two instructions are swapped in order it then gets the wrong register. I am not yet sure why this occurs, as there seems to be code above to deal with this exact situation. At line 3429 is the following: /* Generally, the positions are not allowed to be out of order, lest the modified insn sequence have different register lifetimes. We can make an exception when pos 1 is adjacent to pos 0. */ if (pos[1] + 4 == pos[0]) { bfd_byte *tmp = pos[0]; pos[0] = pos[1]; pos[1] = tmp; } This is far as my analysis has got with the limited time I have had to look at this so far. -- Configure bugmail: http://sourceware.org/bugzilla/userprefs.cgi?tab=email ------- You are receiving this mail because: ------- You are on the CC list for the bug. _______________________________________________ bug-binutils mailing list bug-binutils@gnu.org http://lists.gnu.org/mailman/listinfo/bug-binutils