http://sourceware.org/bugzilla/show_bug.cgi?id=14911
Bug #: 14911
Summary: On ARM FIQ banked registers are case sensitive.
Product: binutils
Version: unspecified
Status: NEW
Severity: minor
Priority: P2
Component: gas
AssignedTo: unassig...@sourceware.org
ReportedBy: d...@ucore.info
Classification: Unclassified
I'm developing software using ARM Virtualization Extension. I use some
macros to shorten up some code, but my issue generally just narrows to
assembler, it seems.
I'm using msr/mrs instructions and while:
mrs SP_SVC, r1
works, the:
mrs SP_FIQ, r1
gives:
/tmp/ccZWskys.s:490: Error: selected processor does not support
requested special purpose register -- `msr SP_FIQ,r1'
only after I change to:
mrs SP_fiq, r1
the problem is gone.
This is not a big deal, but I still need a workaround for this in my
code. That's why I would like to report it. I guess register names
should be case insensitive.
I tried a lot of toolchains (different versions from linaro and
codesourcery) and all seem to be affected.
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