https://sourceware.org/bugzilla/show_bug.cgi?id=21124
Bug ID: 21124
Summary: [PowerPC] Source and target registers must be
different for some load instructions - should be
decoded as invalid
Product: binutils
Version: 2.26
Status: UNCONFIRMED
Severity: normal
Priority: P2
Component: binutils
Assignee: unassigned at sourceware dot org
Reporter: nholcomb at wisc dot edu
Target Milestone: ---
The source and target registers must be different for some load instructions.
For example,
7c 00 02 28 is an invalid instruction, but decoding the instruction with
libopcodes returns "lqarx r0, 0, r0".
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